{8,(O%google,scarlet-rev15-sku0google,scarlet-rev15google,scarlet-rev14-sku0google,scarlet-rev14google,scarlet-rev13-sku0google,scarlet-rev13google,scarlet-rev12-sku0google,scarlet-rev12google,scarlet-rev11-sku0google,scarlet-rev11google,scarlet-rev10-sku0google,scarlet-rev10google,scarlet-rev9-sku0google,scarlet-rev9google,scarlet-rev8-sku0google,scarlet-rev8google,scarlet-rev7-sku0google,scarlet-rev7google,scarlet-rev6-sku0google,scarlet-rev6google,scarlet-rev5-sku0google,scarlet-rev5google,scarletgoogle,grurockchip,rk3399 +7tabletDGoogle ScarletaliasesJ/ethernet@fe300000T/i2c@ff3c0000Y/i2c@ff110000^/i2c@ff120000c/i2c@ff130000h/i2c@ff3d0000m/i2c@ff140000r/i2c@ff150000w/i2c@ff160000|/i2c@ff3e0000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/mmc@fe320000/mmc@fe330000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid ( < Gcpu@1cpuarm,cortex-a53pscid ( < Gcpu@2cpuarm,cortex-a53pscid ( < Gcpu@3cpuarm,cortex-a53pscid ( < Gcpu@100cpuarm,cortex-a72psci  ( <Gthermal-idleO'[cpu@101cpuarm,cortex-a72psci  ( <Gthermal-idleO'[idle-stateskpscicpu-sleeparm,idle-statexx[G cluster-sleeparm,idle-statex[G display-subsystemrockchip,display-subsystemmemory-controllerrockchip,rk3399-dmcdmc_clkokay( (;V@o'Z'Z'Z; 7P(/pmu_a53arm,cortex-a53-pmu=pmu_a72arm,cortex-a72-pmu=psci arm,psci-1.0smctimerarm,armv8-timer@=   Hxin24m fixed-clock_n6oxin24mGpcie@f8000000rockchip,rk3399-pcie axi-baseapb-basepci+ Gaclkaclk-perfhclkpm0=123syslegacyclient` , pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-388(%coremgmtmgmt-stickypipepmpclkaclkokay 1:defaultHRbrinterrupt-controllerGpcie@0,0+wifi@0,0 qcom,ath10k( GO_DUMOethernet@fe300000rockchip,rk3399-gmac0= macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac %stmmaceth  disabledmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@=@р Mbiuciuciu-driveciu-sampley%reset disabledmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@=Aр   Lbiuciuciu-driveciu-samplez%resetokay:defaultH!"#$%.8J [& do|'(mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13=   NрNclk_xinclk_ahboemmc_cardclock)  phy_arasanokay. Gusb@fe380000 generic-ehci8=*+ usb disabledusb@fe3a0000 generic-ohci:=*+ usbokay+bluetooth@1usbcf3,e300usb4ca,301a:defaultH, &=wakeupusb@fe3c0000 generic-ehci<=-. usb disabledusb@fe3e0000 generic-ohci>= -. usb disableddebug@fe430000&arm,coresight-cpu-debugarm,primecellCM apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL apb_pclkusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% %usb3-otgokay/usb@fe800000 snps,dwc3=irefbus_earlysuspend"host01 usb2-phyusb3-phy *utmi_wide3Klokayusb@fe900000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& %usb3-otg disabledusb@fe900000 snps,dwc3=nrefbus_earlysuspend"otg23 usb2-phyusb3-phy *utmi_wide3Kl disableddp@fec00000rockchip,rk3399-cdn-dp=  r  ruocore-clkpclkspdifgrf4 HJ%spdifdptxapbcore okay/Gportsport+endpoint@05Gendpoint@16Ginterrupt-controller@fee00000 arm,gic-v3+P = Ginterrupt-controller@fee20000arm,gic-v3-itsGppi-partitionsinterrupt-partition-0Ginterrupt-partition-1Gsaradc@ff100000rockchip,rk3399-saradc=> Pesaradcapb_pclk %saradc-apb disabledi2c@ff110000rockchip,rk3399-i2c A AU i2cpclk=;:defaultH7+ disabledi2c@ff120000rockchip,rk3399-i2c B BV i2cpclk=#:defaultH8+okay_26,digitizer@9 hid-over-i2c  &=M:defaultH9:i2c@ff130000rockchip,rk3399-i2c C CW i2cpclk=":defaultH;+okay_26,touchscreen@10elan,ekth3500 &=:defaultH<= \ i2c@ff140000rockchip,rk3399-i2c D DX i2cpclk=&:defaultH>+ disabledi2c@ff150000rockchip,rk3399-i2c E EY i2cpclk=%:defaultH?+ disabledi2c@ff160000rockchip,rk3399-i2c F FZ i2cpclk=$:defaultH@A+okay_26,camera@36 ovti,ov56956:defaultHBxvclkhCtD \EportendpointFGcamera@3c ovti,ov2685<:defaultHGxvclkhCt \EportendpointHGserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclk=c:defaultHI disabledserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclk=b:defaultHJ disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclk=d:defaultHKokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclk=e:defaultHL disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclk=DM M txrx:defaultHNOPQ+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk=5M M txrx:defaultsleepHRSTU+okayVflash@0jedec,spi-norspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk=4MMtxrx:defaultHWXYZ+okaycr50@0 google,cr50 &=:defaultH[ 5spi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclk=CMMtxrx:defaultH\]^_+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclk=`` txrx:defaultHabcd+okayec@0google,cros-ec-spi &=:defaultHe-i2c-tunnelgoogle,cros-ec-i2c-tunnel+sbs-battery@bsbs,sbs-battery extcon0google,extcon-usbc-cros-ecG/keyboard-controllergoogle,cros-ec-keyb(8 KDe;<=>?@A B CD}0Y1 d"#(  \V |})   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ithermal-zonescpu-thermalrdftripscpu_alert0?passiveGgcpu_alert1X?passiveGhcpu_crits ?criticalcooling-mapsmap0gmap1hHgpu-thermalrdftripsgpu_alert0$?passiveGigpu_crits ?criticalcooling-mapsmap0i jtsadc@ff260000rockchip,rk3399-tsadc&=a O qOdtsadcapb_pclk %tsadc-apb s:initdefaultsleepHklkokay  Gfqos@ffa58000rockchip,rk3399-qossyscon Gtqos@ffa5c000rockchip,rk3399-qossyscon Guqos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon Gxqos@ffa70080rockchip,rk3399-qossyscon Gyqos@ffa74000rockchip,rk3399-qossyscon@ Gvqos@ffa76000rockchip,rk3399-qossyscon` Gwqos@ffa90000rockchip,rk3399-qossyscon Gzqos@ffa98000rockchip,rk3399-qossyscon Gmqos@ffaa0000rockchip,rk3399-qossyscon G{qos@ffaa0080rockchip,rk3399-qossyscon G|qos@ffaa8000rockchip,rk3399-qossyscon G}qos@ffaa8080rockchip,rk3399-qossyscon G~qos@ffab0000rockchip,rk3399-qossyscon Gnqos@ffab0080rockchip,rk3399-qossyscon Goqos@ffab8000rockchip,rk3399-qossyscon Gpqos@ffac0000rockchip,rk3399-qossyscon Gqqos@ffac0080rockchip,rk3399-qossyscon Grqos@ffac8000rockchip,rk3399-qossyscon Gqos@ffac8080rockchip,rk3399-qossyscon Gqos@ffad0000rockchip,rk3399-qossyscon Gqos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon Gspower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller :+Gpower-domain@34" Nm :power-domain@33! Nno :power-domain@31 Np :power-domain@32  Nqr :power-domain@35# Ns :power-domain@25l :power-domain@23 Nt :power-domain@22f Nu :power-domain@27L Nv :power-domain@28 Nw :power-domain@8~} :power-domain@9  :power-domain@24 Nxy :power-domain@15 :+power-domain@21r Nz :power-domain@19 N{| :power-domain@20 N}~ :power-domain@16 :+power-domain@17 N :power-domain@18 N :syscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2Gio-domains&rockchip,rk3399-pmu-io-voltage-domainokay Uspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5spiclkapb_pclk=<:defaultH+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7"baudclkapb_pclk=f:defaultH disabledi2c@ff3c0000rockchip,rk3399-i2c<    i2cpclk=9:defaultH+ disabledi2c@ff3d0000rockchip,rk3399-i2c=    i2cpclk=8:defaultH+ disabledi2c@ff3e0000rockchip,rk3399-i2c>    i2cpclk=::defaultH+okay_26,da7219@1a dlg,da7219 &=Ymclk d ( tdiff:defaultH   Gda7219_aad   2   32ms_64ms    * :! J>pwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB \:defaultHokayGpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB \:defaultHokayGpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  \:defaultHokayGpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 \:defaultHokayGdfi@ff630000c@rockchip,rk3399-dfi=y pclk_ddr_monokayGvideo-codec@ff650000rockchip,rk3399-vpue =rq vepuvdpu aclkhclk giommu@ff650800rockchip,iommue@=s aclkiface nGvideo-codec@ff660000rockchip,rk3399-vdecf=t axiahbcabaccore g iommu@ff660480rockchip,iommu f@f@=u aclkiface  nGiommu@ff670800rockchip,iommug@=* aclkiface n disabledrga@ff680000rockchip,rk3399-rgah=7maclkhclksclkjgi %coreaxiahb!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@ = {  apb_pclkG`dma-controller@ff6e0000arm,pl330arm,primecelln@ = {  apb_pclkGMclock-controller@ff750000rockchip,rk3399-pmucruuxin24m  (JGclock-controller@ff760000rockchip,rk3399-cruvxin24m   @BCxD#F_^;рxh<4`/ׄ ׄׄGsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+G io-domains"rockchip,rk3399-io-voltage-domainokay    (mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrf okayGusb2phy@e450rockchip,rk3399-usb2phyP{phyclkoclk_usbphy0_480mokayG*host-port = linestateokayG+otg-port 0=ghjotg-bvalidotg-idlinestateokayG0usb2phy@e460rockchip,rk3399-usb2phy`|phyclkoclk_usbphy1_480m disabledG-host-port = linestateokayG.otg-port 0=lmootg-bvalidotg-idlinestateokayG2phy@f780rockchip,rk3399-emmc-phy$emmcclk 2 okayG)pcie-phyrockchip,rk3399-pcie-phyrefclk %phyokayGphy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref ~L%uphyuphy-pipeuphy-tcphy okay/dp-port G4usb3-port G1phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-ref  M%uphyuphy-pipeuphy-tcphy  disableddp-port usb3-port G3watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|=xrktimer@ff850000rockchip,rk3399-timer=QhZ pclktimerspdif@ff870000rockchip,rk3399-spdif=B`tx mclkhclkUokayGi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s ='``txrxi2s_clki2s_hclkV:bclk_onbclk_offHokayGi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s=(``txrxi2s_clki2s_hclkW:defaultH disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s=)``txrxi2s_clki2s_hclkX disabledGvop@ff8f0000rockchip,rk3399-vop-lit =w ׄaclk_vopdclk_vophclk_vop g %axiahbdclkokayport+Gendpoint@0Gendpoint@1Gendpoint@2Gendpoint@3Gendpoint@4G6iommu@ff8f3f00rockchip,iommu?=w aclkiface nokayGvop@ff900000rockchip,rk3399-vop-big =v ׄaclk_vopdclk_vophclk_vop g %axiahbdclkokayport+Gendpoint@0Gendpoint@1Gendpoint@2Gendpoint@3Gendpoint@4G5iommu@ff903f00rockchip,iommu?=v aclkiface nokayGisp0@ff910000rockchip,rk3399-cif-isp@=+nispaclkhclk g dphyokayports+port@0+endpoint@0GFendpoint@1GHiommu@ff914000rockchip,iommu @P=+ aclkiface n okayGisp1@ff920000rockchip,rk3399-cif-isp@=,oispaclkhclk g dphy disabledports+port@0+iommu@ff924000rockchip,iommu @P=, aclkiface n Ghdmi-soundsimple-audio-card i2s 4 Nhdmi-sound disabledsimple-audio-card,cpu esimple-audio-card,codec ehdmi@ff940000rockchip,rk3399-dw-hdmi=(tqpoiahbisfrcecgrfref  disabledGportsport+endpoint@0Gendpoint@1Gmipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi=- porefpclkphy_cfggrf%apb +okay oports+port@0+endpoint@0Gendpoint@1Gport@1endpointGpanel@0 | :defaultHinnolux,p097pfgh ports+port@0endpointGport@1endpoint@1Gmipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi=. qorefpclkphy_cfggrf%apb + okayGports+port@0+endpoint@0Gendpoint@1Gport@1endpointGedp@ff970000rockchip,rk3399-edp= jlo dppclkgrf:defaultH%dp  disabledports+port@0+endpoint@0Gendpoint@1Ggpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600= jobmmugpu#okay( Gjpinctrlrockchip,rk3399-pinctrl +:default Hgpio@ff720000rockchip,gpio-bankr=   CLK_32K_APEC_IN_RW_ODSPK_PA_ENWLAN_PERST_1V8_LWLAN_PD_1V8_LWLAN_RF_KILL_1V8_LBIGCPU_DVS_PWMSD_CD_L_JTAG_ENBT_EN_BT_RF_KILL_1V8_LPMUIO2_33_18_L_PP3300_S0_ENTOUCH_RESET_LAP_EC_WARM_RESET_REQPEN_RESET_LAP_FLASH_WP_LGgpio@ff730000rockchip,gpio-banks=   PEN_INT_ODLPEN_EJECT_ODLBT_HOST_WAKE_1V8_LWLAN_HOST_WAKE_1V8_LTOUCH_INT_ODLAP_EC_S3_S0_LAP_EC_OVERTEMPAP_SPI_FLASH_MISOAP_SPI_FLASH_MOSI_RAP_SPI_FLASH_CLK_RAP_SPI_FLASH_CS_L_RSD_CARD_DET_ODLAP_EXPANSION_IO1AP_EXPANSION_IO2AP_I2C_DISP_SDAAP_I2C_DISP_SCLH1_INT_ODLEC_AP_INT_ODLLITCPU_DVS_PWMAP_I2C_AUDIO_SDAAP_I2C_AUDIO_SCLAP_EXPANSION_IO3HEADSET_INT_ODLAP_EXPANSION_IO4G&gpio@ff780000rockchip,gpio-bankxP=   AP_I2C_PEN_SDAAP_I2C_PEN_SCLSD_IO_PWR_ENUCAM_RST_LPP1250_CAM_ENWCAM_RST_LAP_EXPANSION_IO5AP_I2C_CAM_SDAAP_I2C_CAM_SCLAP_H1_SPI_MISOAP_H1_SPI_MOSIAP_H1_SPI_CLKAP_H1_SPI_CS_LUART_EXPANSION_TX_AP_RXUART_AP_TX_EXPANSION_RXUART_EXPANSION_RTS_AP_CTSUART_AP_RTS_EXPANSION_CTSAP_SPI_EC_MISOAP_SPI_EC_MOSIAP_SPI_EC_CLKAP_SPI_EC_CS_LPP2800_CAM_ENCLK_24M_CAMWLAN_PCIE_CLKREQ_1V8_LSD_PWR_3000_1800_LGEgpio@ff788000rockchip,gpio-bankxQ=   I2S0_SCLKI2S0_LRCK_RXI2S0_LRCK_TXI2S0_SDI_0STRAP_LCDBIAS_LSTRAP_FEATURE_1STRAP_FEATURE_2I2S0_SDO_0gpio@ff790000rockchip,gpio-bankyR=   I2S_MCLKAP_I2C_EXPANSION_SDAAP_I2C_EXPANSION_SCLDMIC_ENAP_I2C_TS_SDAAP_I2C_TS_SCLGPU_DVS_PWMUART_DBG_TX_AP_RXUART_AP_TX_DBG_RXBL_ENBL_PWMDISPLAY_RST_LPPVARP_LCD_ENPPVARN_LCD_ENSD_SLOT_PWR_ENGpcfg-pull-up Gpcfg-pull-down Gpcfg-pull-none Gpcfg-pull-none-12ma  Gpcfg-pull-none-13ma  Gpcfg-pull-none-18ma  pcfg-pull-none-20ma  pcfg-pull-up-2ma  pcfg-pull-up-8ma  pcfg-pull-up-18ma  pcfg-pull-up-20ma  pcfg-pull-down-4ma  pcfg-pull-down-8ma  pcfg-pull-down-12ma  pcfg-pull-down-18ma  pcfg-pull-down-20ma  pcfg-output-high Gpcfg-output-low pcfg-input-enable &pcfg-input-pull-up &  pcfg-input-pull-down &  clockclk-32k 3Gcifcif-clkin 3 cif-clkouta 3 edpedp-hpd 3Ggmacrgmii-pins 3    rmii-pins 3     i2c0i2c0-xfer 3Gi2c1i2c1-xfer 3G7i2c2i2c2-xfer 3G8i2c3i2c3-xfer 3G;i2c4i2c4-xfer 3  Gi2c5i2c5-xfer 3  G>i2c6i2c6-xfer 3  G?i2c7i2c7-xfer 3G@i2c8i2c8-xfer 3Gi2s0i2s0-2ch-bus` 3i2s0-8ch-bus` 3Gi2s0-8ch-bus-bclk-off` 3Gi2s1i2s1-2ch-busP 3Gi2s1-2ch-bus-bclk-offP 3sdio0sdio0-bus1 3sdio0-bus4@ 3sdio0-cmd 3sdio0-clk 3sdio0-cd 3sdio0-pwr 3sdio0-bkpwr 3sdio0-wp 3sdio0-int 3sdmmcsdmmc-bus1 3sdmmc-bus4@ 3   G%sdmmc-clk 3 G!sdmmc-cmd 3 G"sdmmc-cd 3G#sdmmc-wp 3sdmmc-cd-pin 3 G$suspendap-pwroff 3Gddrio-pwroff 3spdifspdif-bus 3spdif-bus-1 3spi0spi0-clk 3GNspi0-cs0 3GQspi0-cs1 3spi0-tx 3GOspi0-rx 3GPspi1spi1-clk 3 GRspi1-cs0 3 GUspi1-rx 3GTspi1-tx 3GSspi1-sleep@ 3  GVspi2spi2-clk 3 GWspi2-cs0 3 GZspi2-rx 3 GYspi2-tx 3 GXspi3spi3-clk 3Gspi3-cs0 3Gspi3-rx 3Gspi3-tx 3Gspi4spi4-clk 3G\spi4-cs0 3G_spi4-rx 3G^spi4-tx 3G]spi5spi5-clk 3Gaspi5-cs0 3Gdspi5-rx 3Gcspi5-tx 3Gbtestclktest-clkout0 3test-clkout1 3GAtest-clkout2 3tsadcotp-pin 3Gkotp-out 3Gluart0uart0-xfer 3GIuart0-cts 3uart0-rts 3uart1uart1-xfer 3  GJuart2auart2a-xfer 3 uart2buart2b-xfer 3uart2cuart2c-xfer 3GKuart3uart3-xfer 3GLuart3-cts 3uart3-rts 3uart4uart4-xfer 3Guarthdcpuarthdcp-xfer 3pwm0pwm0-pin 3Gpwm0-pin-pull-down 3vop0-pwm-pin 3vop1-pwm-pin 3pwm1pwm1-pin 3Gpwm1-pin-pull-down 3pwm2pwm2-pin 3Gpwm2-pin-pull-down 3pwm3apwm3a-pin 3Gpwm3bpwm3b-pin 3hdmihdmi-i2c-xfer 3hdmi-cec 3pciepci-clkreqn-cpm 3Gpci-clkreqnb-cpm 3pcfg-pull-none-8ma  Gbacklight-enablebl-en 3Gcros-ecec-ap-int-l 3Gediscrete-regulatorssd-io-pwr-en 3Gsd-pwr-1800-sel 3Gsd-slot-pwr-en 3Gdisplay-rst-l 3Gppvarp-lcd-en 3Gppvarn-lcd-en 3Gcodecheadset-int-l 3Gmic-int 3 max98357asdmode-en 3Gtouchscreentouch-int-l 3G<touch-reset-l 3 G=trackpadap-i2c-tp-pu-en 3 trackpad-int-l 3wifiwlan-module-reset-l 3 bt-host-wake-l 3G,bt-en-1v8-l 3Gwlan-pd-1v8-l 3Gwlan-rf-kill-1v8-l 3Gwifi-perst-l 3Gwlan-host-wake-l 3write-protectap-fw-wp 3 pcfg-pull-none-6ma  Gcamerapp1250-dvdd 3Gpp2800-avdd 3Gucam_rst 3GGwcam_rst 3GBdigitizerpen-int-odl 3G9pen-reset-l 3 G:dmicdmic-en 3Gpenpen-eject-odl 3Gtpmh1-int-od-l 3G[opp-table-0operating-points-v2 AG opp00 LQ S 5 a@opp01 L#F S opp02 L0, S Popp03 L< S opp04 LG Sopp05 LTfr S ropp06 LZJ S0opp-table-1operating-points-v2 AG opp00 LQ S 5 a@opp01 L#F S 5opp02 L0, S opp03 L< S Popp04 LG S opp05 LTfr Sopp06 L_" S ropp07 LkI S0opp08 Lx) Sopp-table-2operating-points-v2Gopp00 L  S 5opp01 L@ S 5opp02 Lׄ S opp03 Le S Popp04 L#F SHopp05 L/ Sg8dmc_opp_tableoperating-points-v2Gopp00 Lׄ S opp01 L'Z S opp02 L/ S opp03 L7P( S  rchosen ~serial2:115200n8ppvar-sysregulator-fixed ppvar_sys  Gpp1200-lpddrregulator-fixed pp1200_lpddr   O O pp1800regulator-fixed pp1800   w@ w@ Gpp3300regulator-fixed pp3300   2Z 2Z Gpp5000regulator-fixed pp5000   LK@ LK@ ppvar-bigcpu-pwmpwm-regulator ppvar_bigcpu_pwm   d d   5J Gppvar-bigcpuvctrl-regulator ppvar_bigcpu 5J  1 = 5J PBGppvar-litcpu-pwmpwm-regulator ppvar_litcpu_pwm   d d   =J NGppvar-litcpuvctrl-regulator ppvar_litcpu =J N 1 = =JN PG ppvar-gpu-pwmpwm-regulator ppvar_gpu_pwm   d d   3p PGppvar-gpuvctrl-regulator ppvar_gpu 3p P 1 = 3pP PGpp900-appp3000-sd-slotregulator-fixed pp3000_sd_slot:defaultH n  G'ppvar-sd-card-ioregulator-gpio ppvar_sd_card_io:defaultH n E 4E!w@2Z w@ 2ZG(pp3300-trackpadap-rtc-clk fixed-clock_oxin32kmax98357amaxim,max98357a:defaultH  okayGsoundrockchip,rk3399-gru-sound  pp1250-s3regulator-fixed pp1250_s3     Gpp1250-dvddregulator-fixed pp1250_dvdd:defaultH n E  GDpp900-s0regulator-fixed pp900_s0     Gppvarn-lcdregulator-fixed ppvarn_lcd:defaultH n  Gppvarp-lcdregulator-fixed ppvarp_lcd:defaultH n  Gpp900-s3regulator-fixed pp900_s3     pp2800-avddregulator-fixed pp2800_avdd:defaultH n E d GCbt-3v3regulator-fixed bt_3v3:defaultH n  Gwlan-3v3regulator-fixed wlan_3v3:defaultH n  ' Gbacklightpwm-backlight :defaultH B@ 'Gdmic dmic-codec :defaultHGgpio-keys gpio-keys:defaultHswitch-pen-insert Pen Insert 4&%0A compatibleinterrupt-parent#address-cells#size-cellschassis-typemodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusrockchip,pd-idle-nsrockchip,sr-idle-nsrockchip,sr-mc-gate-idle-nsrockchip,srpd-lite-idle-nsrockchip,standby-idle-nsrockchip,ddr3_odt_dis_freqrockchip,lpddr3_odt_dis_freqrockchip,lpddr4_odt_dis_freqrockchip,sr-mc-gate-idle-dis-freq-hzrockchip,srpd-lite-idle-dis-freq-hzrockchip,standby-idle-dis-freq-hzcenter-supplyinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesep-gpiospinctrl-namespinctrl-0vpcie3v3-supplyvpcie1v8-supplyvpcie0v9-supplypcie-reset-suspendinterrupt-controllerqcom,ath10k-calibration-variantpower-domainsrockchip,grfsnps,txpblmax-frequencyfifo-depthassigned-clocksassigned-clock-ratesbus-widthcap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removableextcondr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsi2c-scl-falling-time-nsi2c-scl-rising-time-nshid-descr-addrreset-gpiosavdd-supplydvdd-supplydovdd-supplydata-lanesreg-shiftreg-io-widthdmasdma-namespinctrl-1spi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countgoogle,usb-port-idkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymappolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplydlg,micbias-lvldlg,mic-amp-in-selVDD-supplyVDDMIC-supplyVDDIO-supplydlg,adc-1bit-rptdlg,btn-avgdlg,btn-cfgdlg,mic-det-thrdlg,jack-ins-debdlg,jack-det-ratedlg,jack-rem-debdlg,a-d-btn-thrdlg,d-b-btn-thrdlg,b-c-btn-thrdlg,c-mic-btn-thr#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiclock-masterbacklightenable-gpiosavee-supplymali-supplygpio-controller#gpio-cellsgpio-line-namesbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltvin-supplypwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitctrl-supplyctrl-voltage-rangeregulator-settling-time-up-usenable-active-highgpioenable-gpiosdmode-gpiossdmode-delayrockchip,cpurockchip,codecstartup-delay-usregulator-enable-ramp-delaypwm-delay-usdmicen-gpioswakeup-delay-mslabellinux,codelinux,input-typewakeup-source