8( Ԩ>radxa,rockpi-n10vamrs,rk3399pro-vmarc-somrockchip,rk3399pro +7Radxa ROCK Pi N10aliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/mmc@fe320000/mmc@fe330000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid  / :cpu@1cpuarm,cortex-a53pscid  / :cpu@2cpuarm,cortex-a53pscid  / :cpu@3cpuarm,cortex-a53pscid  / :cpu@100cpuarm,cortex-a72psci   :thermal-idleB'Ncpu@101cpuarm,cortex-a72psci   :thermal-idleB'Nidle-states^pscicpu-sleeparm,idle-statek|xN: cluster-sleeparm,idle-statek|N: display-subsystemrockchip,display-subsystemmemory-controllerrockchip,rk3399-dmcdmc_clk disabledpmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clock n6xin24m/:pcie@f8000000rockchip,rk3399-pcie  ./usbokaydebug@fe430000&arm,coresight-cpu-debugarm,primecellCM apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL apb_pclkusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otgokayusb@fe800000 snps,dwc3irefbus_earlysuspendotg01usb2-phyusb3-phy 'utmi_wide0HiNokayusb@fe900000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otg disabledusb@fe900000 snps,dwc3nrefbus_earlysuspendotg23usb2-phyusb3-phy 'utmi_wide0HiN disableddp@fec00000rockchip,rk3399-cdn-dp r  ruocore-clkpclkspdifgrf45N HJspdifdptxapbcore\ disabledportsport+endpoint@06:endpoint@17:interrupt-controller@fee00000 arm,gic-v3F+9P  :interrupt-controller@fee20000arm,gic-v3-its:ppi-partitionsinterrupt-partition-0:interrupt-partition-1:saradc@ff100000rockchip,rk3399-saradc> Pesaradcapb_pclk saradc-apb disabledi2c@ff110000rockchip,rk3399-i2cA AU i2cpclk;default8+okay3i2c@ff120000rockchip,rk3399-i2cB BV i2cpclk#default9+okay rtc@51haoyu,hym8563Q/hym8563default: ;:i2c@ff130000rockchip,rk3399-i2cC CW i2cpclk"default<+okay3:i2c@ff140000rockchip,rk3399-i2cD DX i2cpclk&default=+ disabledi2c@ff150000rockchip,rk3399-i2cE EY i2cpclk%default>+ disabledi2c@ff160000rockchip,rk3399-i2cF FZ i2cpclk$default?+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkcJTdefault@Aokayserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkbJTdefaultB disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkdJTdefaultCokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclkeJTdefaultD disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkDaE E ftxrxdefaultFGHI+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk5aE E ftxrxdefaultJKLM+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4aEEftxrxdefaultNOPQ+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkCaEEftxrxdefaultRSTU+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclkaVV ftxrxdefaultWXYZN+ disabledthermal-zonescpu-thermalpd[tripscpu_alert0ppassive:\cpu_alert1$passive:]cpu_crits criticalcooling-mapsmap0\map1]Hgpu-thermalpd[tripsgpu_alert0$passive:^gpu_crits criticalcooling-mapsmap0^ _tsadc@ff260000rockchip,rk3399-tsadc&aO qOdtsadcapb_pclk tsadc-apb\sinitdefaultsleep`a`okay':[qos@ffa58000rockchip,rk3399-qossyscon :iqos@ffa5c000rockchip,rk3399-qossyscon :jqos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon :mqos@ffa70080rockchip,rk3399-qossyscon :nqos@ffa74000rockchip,rk3399-qossyscon@ :kqos@ffa76000rockchip,rk3399-qossyscon` :lqos@ffa90000rockchip,rk3399-qossyscon :oqos@ffa98000rockchip,rk3399-qossyscon :bqos@ffaa0000rockchip,rk3399-qossyscon :pqos@ffaa0080rockchip,rk3399-qossyscon :qqos@ffaa8000rockchip,rk3399-qossyscon :rqos@ffaa8080rockchip,rk3399-qossyscon :sqos@ffab0000rockchip,rk3399-qossyscon :cqos@ffab0080rockchip,rk3399-qossyscon :dqos@ffab8000rockchip,rk3399-qossyscon :eqos@ffac0000rockchip,rk3399-qossyscon :fqos@ffac0080rockchip,rk3399-qossyscon :gqos@ffac8000rockchip,rk3399-qossyscon :tqos@ffac8080rockchip,rk3399-qossyscon :uqos@ffad0000rockchip,rk3399-qossyscon :vqos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon :hpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controllerB+:power-domain@34"VbBpower-domain@33!VcdBpower-domain@31VeBpower-domain@32 VfgBpower-domain@35#VhBpower-domain@25lBpower-domain@23ViBpower-domain@22fVjBpower-domain@27LVkBpower-domain@28VlBpower-domain@8~}Bpower-domain@9 Bpower-domain@24VmnBpower-domain@15B+power-domain@21rVoBpower-domain@19VpqBpower-domain@20VrsBpower-domain@16B+power-domain@17VtuBpower-domain@18VvBsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2:io-domains&rockchip,rk3399-pmu-io-voltage-domainokay]wspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5xxspiclkapb_pclk<defaultyz{|+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7xx"baudclkapb_pclkfJTdefault} disabledi2c@ff3c0000rockchip,rk3399-i2c<x  x x i2cpclk9default~+okay 3pmic@20rockchip,rk809  /rk808-clkout1rk808-clkout2defaultlregulatorsDCDC_REG1vdd_log*< qTplregulator-state-mem DCDC_REG2 vdd_cpu_l*< qTpql: regulator-state-memDCDC_REG3vcc_ddr*lregulator-state-memDCDC_REG4 vcc3v3_sys*<2ZT2Zl:regulator-state-mem2ZDCDC_REG5 vcc_buck5*<!T!:regulator-state-mem!LDO_REG1 vcca_0v9*< T :regulator-state-mem LDO_REG2vcc_1v8*<w@Tw@:wregulator-state-memw@LDO_REG3vcc_0v9*< T regulator-state-mem LDO_REG4 vcca_1v8*<:T::regulator-state-mem:LDO_REG5 vdd1v5_dvp*<`T`regulator-state-memLDO_REG6vcc_1v5*<`T`regulator-state-memLDO_REG7 vccio_3v0*<-T-:regulator-state-memLDO_REG8 vccio_sd*<w@T2Z:&regulator-state-memLDO_REG9vcc_sd*<2ZT2Zregulator-state-memSWITCH_REG1 vcc5v0_usb2<LK@TLK@regulator-state-memLK@SWITCH_REG2 vccio_3v3*<2ZT2Z: regulator-state-memi2c@ff3d0000rockchip,rk3399-i2c=x  x x i2cpclk8default+ disabledi2c@ff3e0000rockchip,rk3399-i2c>x  x x i2cpclk:default+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefaultxokaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefaultx disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB defaultxokaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0defaultx disableddfi@ff630000c@rockchip,rk3399-dfiy pclk_ddr_mon disabled:video-codec@ff650000rockchip,rk3399-vpue rq mvepuvdpu aclkhclkNiommu@ff650800rockchip,iommue@s aclkifaceN:video-codec@ff660000rockchip,rk3399-vdecft axiahbcabaccoreN iommu@ff660480rockchip,iommu f@f@u aclkifaceN :iommu@ff670800rockchip,iommug@* aclkiface disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkjgi coreaxiahbN!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@    apb_pclk:Vdma-controller@ff6e0000arm,pl330arm,primecelln@    apb_pclk:Eclock-controller@ff750000rockchip,rk3399-pmucruuxin24m\/ &x(J:xclock-controller@ff760000rockchip,rk3399-cruvxin24m\/ &@BCxD#g/;рxh<4`#Fׄׄ ׄ:syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+:io-domains"rockchip,rk3399-io-voltage-domainokay 3 @ P&mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrfN ] disabled:usb2phy@e450rockchip,rk3399-usb2phyP{phyclk/clk_usbphy0_480mokay:,host-port ] mlinestateokay:-otg-port ]0ghjmotg-bvalidotg-idlinestateokay:0usb2phy@e460rockchip,rk3399-usb2phy`|phyclk/clk_usbphy1_480mokay:.host-port ] mlinestateokay:/otg-port ]0lmomotg-bvalidotg-idlinestate disabled:2phy@f780rockchip,rk3399-emmc-phy$emmcclk h2 ]okay:+pcie-phyrockchip,rk3399-pcie-phyrefclk ]phyokay:phy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~NLuphyuphy-pipeuphy-tcphy\okaydp-port ]:4usb3-port ]:1phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-refN Muphyuphy-pipeuphy-tcphy\ disableddp-port ]:5usb3-port ]:3watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifBaVftx mclkhclkUdefaultN disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s\'aVVftxrxi2s_clki2s_hclkVbclk_onbclk_offN disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(aVVftxrxi2s_clki2s_hclkWdefaultN disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)aVVftxrxi2s_clki2s_hclkXN disabled:vop@ff8f0000rockchip,rk3399-vop-lit wׄaclk_vopdclk_vophclk_vopN axiahbdclkokayport+:endpoint@0:endpoint@1:endpoint@2:endpoint@3:endpoint@4:7iommu@ff8f3f00rockchip,iommu?w aclkifaceNokay:vop@ff900000rockchip,rk3399-vop-big vׄaclk_vopdclk_vophclk_vopN axiahbdclkokayport+:endpoint@0:endpoint@1:endpoint@2:endpoint@3:endpoint@4:6iommu@ff903f00rockchip,iommu?v aclkifaceNokay:isp0@ff910000rockchip,rk3399-cif-isp@+nispaclkhclkdphyN disabledports+port@0+iommu@ff914000rockchip,iommu @P+ aclkifaceN |:isp1@ff920000rockchip,rk3399-cif-isp@,oispaclkhclkdphyN disabledports+port@0+iommu@ff924000rockchip,iommu @P, aclkifaceN |:hdmi-soundsimple-audio-card i2s  hdmi-sound disabledsimple-audio-card,cpu simple-audio-card,codec hdmi@ff940000rockchip,rk3399-dw-hdmi(tqpoiahbisfrcecgrfrefNT\okay default:portsport+endpoint@0:endpoint@1:mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrfNapb\+ disabledports+port@0+endpoint@0:endpoint@1:mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrfNapb\+ ] disabled:ports+port@0+endpoint@0:endpoint@1:edp@ff970000rockchip,rk3399-edp jlo dppclkgrfdefaultNdp\ disabledports+port@0+endpoint@0:endpoint@1:gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 mjobmmugpuN# disabled:_pinctrlrockchip,rk3399-pinctrl\+gpio@ff720000rockchip,gpio-bankrx  9F:gpio@ff730000rockchip,gpio-banksx  9F:gpio@ff780000rockchip,gpio-bankxP  9F:gpio@ff788000rockchip,gpio-bankxQ  9F:!gpio@ff790000rockchip,gpio-bankyR  9F:;pcfg-pull-up :pcfg-pull-down :pcfg-pull-none /:pcfg-pull-none-12ma / < :pcfg-pull-none-13ma / < :pcfg-pull-none-18ma / <pcfg-pull-none-20ma / <pcfg-pull-up-2ma  <pcfg-pull-up-8ma  <pcfg-pull-up-18ma  <pcfg-pull-up-20ma  <pcfg-pull-down-4ma  <pcfg-pull-down-8ma  <pcfg-pull-down-12ma  < pcfg-pull-down-18ma  <pcfg-pull-down-20ma  <pcfg-output-high Kpcfg-output-low Wpcfg-input-enable bpcfg-input-pull-up b  <pcfg-input-pull-down b  <clockclk-32k ocifcif-clkin o cif-clkouta o edpedp-hpd o:gmacrgmii-pins o    :rmii-pins o     i2c0i2c0-xfer o:~i2c1i2c1-xfer o:8i2c2i2c2-xfer o:9i2c3i2c3-xfer o:<i2c4i2c4-xfer o  :i2c5i2c5-xfer o  :=i2c6i2c6-xfer o  :>i2c7i2c7-xfer o:?i2c8i2c8-xfer o:i2s0i2s0-2ch-bus` oi2s0-8ch-bus o:i2s0-8ch-bus-bclk-off o:i2s1i2s1-2ch-busP o:i2s1-2ch-bus-bclk-offP osdio0sdio0-bus1 osdio0-bus4@ o:#sdio0-cmd o:$sdio0-clk o:%sdio0-cd osdio0-pwr osdio0-bkpwr osdio0-wp osdio0-int osdmmcsdmmc-bus1 osdmmc-bus4@ o   :*sdmmc-clk o :'sdmmc-cmd o :(sdmmc-cd o:)sdmmc-wp osuspendap-pwroff oddrio-pwroff ospdifspdif-bus o:spdif-bus-1 ospi0spi0-clk o:Fspi0-cs0 o:Ispi0-cs1 ospi0-tx o:Gspi0-rx o:Hspi1spi1-clk o :Jspi1-cs0 o :Mspi1-rx o:Lspi1-tx o:Kspi2spi2-clk o :Nspi2-cs0 o :Qspi2-rx o :Pspi2-tx o :Ospi3spi3-clk o:yspi3-cs0 o:|spi3-rx o:{spi3-tx o:zspi4spi4-clk o:Rspi4-cs0 o:Uspi4-rx o:Tspi4-tx o:Sspi5spi5-clk o:Wspi5-cs0 o:Zspi5-rx o:Yspi5-tx o:Xtestclktest-clkout0 otest-clkout1 otest-clkout2 otsadcotp-pin o:`otp-out o:auart0uart0-xfer o:@uart0-cts o:Auart0-rts ouart1uart1-xfer o  :Buart2auart2a-xfer o uart2buart2b-xfer ouart2cuart2c-xfer o:Cuart3uart3-xfer o:Duart3-cts ouart3-rts ouart4uart4-xfer o:}uarthdcpuarthdcp-xfer opwm0pwm0-pin o:pwm0-pin-pull-down ovop0-pwm-pin ovop1-pwm-pin opwm1pwm1-pin o:pwm1-pin-pull-down opwm2pwm2-pin o:pwm2-pin-pull-down opwm3apwm3a-pin o:pwm3bpwm3b-pin ohdmihdmi-i2c-xfer ohdmi-cec o:pciepci-clkreqn-cpm opci-clkreqnb-cpm o:pcie-pwr o:hym8563hym8563-int o::pmicpmic-int-l o:sdio-pwrseqwifi-enable-h o:vbus_hostusb1-en-oc o:vbus_typecusb0-en-oc o:opp-table-0operating-points-v2 }: opp00 Q  @opp01 #F opp02 0, P Popp03 < HHopp04 G B@B@opp05 Tfr **opp-table-1operating-points-v2 }: opp00 Q  @opp01 #F opp02 0, opp03 < Y Yopp04 G ~~opp05 Tfr opp06 _" opp07 kI OOopp-table-2operating-points-v2:opp00  0opp01 @ 0opp02 ׄ 0opp03 e Y Y0opp04 #F HH0opp05 / 0external-gmac-clock fixed-clock sY@ clkin_gmac/:sdio-pwrseqmmc-pwrseq-simple ext_clockdefault :"vcc12v-dcin-regulatorregulator-fixed vcc12v_dcin*<T:vcc5v0-sys-regulatorregulator-fixed vcc5v0_sys*<LK@TLK@ :vbus-hostregulator-fixeddefault vbus_host   ;:vbus-typecregulator-fixeddefault vbus_typec   ;:vcc-pcie-regulatorregulator-fixed  ;default vcc3v3_pcie* :chosen serial2:1500000n8 compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesep-gpiosnum-lanespinctrl-0pinctrl-namesvpcie0v9-supplyvpcie1v8-supplyvpcie3v3-supplyinterrupt-controllerpower-domainsrockchip,grfsnps,txpblassigned-clock-parentsclock_in_outphy-modesnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayassigned-clocksphy-supplysnps,reset-gpiomax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeeddisable-wpvqmmc-supplycd-gpiosarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsi2c-scl-falling-time-nsi2c-scl-rising-time-nsreg-shiftreg-io-widthdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-off-in-suspendregulator-suspend-microvoltregulator-ramp-delayregulator-on-in-suspend#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsreset-gpiosvin-supplyenable-active-highstdout-path