8d(G,(mediatek,mt8183-pumpkinmediatek,mt8183 +7Pumpkin MT8183aliases=/soc/i2c@11007000B/soc/i2c@11011000G/soc/i2c@11009000L/soc/i2c@1100f000Q/soc/i2c@11008000V/soc/i2c@11016000[/soc/i2c@11005000`/soc/i2c@1101a000e/soc/i2c@1101b000j/soc/i2c@11014000o/soc/i2c@11015000u/soc/i2c@11017000{/soc/ovl@14008000/soc/ovl@14009000/soc/ovl@1400a000/soc/rdma@1400b000/soc/rdma@1400c000/soc/serial@11002000opp-table-cluster0operating-points-v2opp0-793000000/D8@ opp0-9100000006= }opp0-1014000000opp0-1417000000Tu@ Popp0-1508000000YA A opp0-1586000000^p 6 opp0-1625000000`ۈ@  opp0-1677000000c@5 opp0-1716000000fHf opp0-1781000000j'@opp0-1846000000nB@opp0-1924000000ropp0-1989000000v@opp-table-cluster1operating-points-v2#opp1-793000000/D8@ `opp1-9100000006= opp1-1014000000opp-689000000)N@ Popp-767000000-} A opp-8450000002]@ 6 opp-8710000003g  opp-92300000075 opp-9620000009Vf opp-1027000000=6opp-1092000000AB@opp-1144000000D0opp-1196000000GIccimediatek,mt8183-ccicciintermediate cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1core2core3cpu@0cpuarm,cortex-a53psci#6cpuintermediateFT`o |!cpu@1cpuarm,cortex-a53psci#6cpuintermediateFT`o |!cpu@2cpuarm,cortex-a53psci#6cpuintermediateFT`o |!cpu@3cpuarm,cortex-a53psci#6cpuintermediateFT`o |!cpu@100cpuarm,cortex-a73psci#6"cpuintermediate#F`o |$cpu@101cpuarm,cortex-a73psci#6"cpuintermediate#F`o |$cpu@102cpuarm,cortex-a73psci#6"cpuintermediate#F`o |$cpu@103cpuarm,cortex-a73psci#6"cpuintermediate#F`o |$idle-statespscicpu-sleeparm,idle-state cluster-sleep-0arm,idle-statecluster-sleep-1arm,idle-state"opp-table-0operating-points-v2Xopp-300000000 h Popp-320000000 Popp-340000000C < Popp-360000000u* Ҧ Popp-380000000W  Popp-400000000ׄ z Popp-420000000  Popp-460000000k  L Popp-500000000e } Popp-540000000 / ` Popp-580000000" 4 Popp-620000000$s  Popp-653000000&@ YF Popp-698000000) Aopp-743000000,IG  6opp-800000000/ Hpmu-a53arm,cortex-a53-pmu %&pmu-a73arm,cortex-a73-pmu %'psci arm,psci-1.0smcfixed-factor-clock-13mfixed-factor-clock(clk13m3oscillator fixed-clock/clk26m(timerarm,armv8-timer %@   soc+ simple-bus?efuse@8000000%mediatek,mt8183-efusemediatek,efuse+ Fdisabledinterrupt-controller@c000000 arm,gic-v3M %^P   @ A B  %ppi-partitionsinterrupt-partition-0s&interrupt-partition-1s'syscon@c530000mediatek,mt8183-mcucfgsyscon Sinterrupt-controller@c530a80.mediatek,mt8183-sysirqmediatek,mt6577-sysirq^M % S Pcpu-debug@d410000&arm,coresight-cpu-debugarm,primecell A). apb_pclkcpu-debug@d510000&arm,coresight-cpu-debugarm,primecell Q). apb_pclkcpu-debug@d610000&arm,coresight-cpu-debugarm,primecell a). apb_pclkcpu-debug@d710000&arm,coresight-cpu-debugarm,primecell q). apb_pclkcpu-debug@d810000&arm,coresight-cpu-debugarm,primecell ). apb_pclkcpu-debug@d910000&arm,coresight-cpu-debugarm,primecell ). apb_pclkcpu-debug@da10000&arm,coresight-cpu-debugarm,primecell ). apb_pclkcpu-debug@db10000&arm,coresight-cpu-debugarm,primecell ). apb_pclksyscon@10000000 mediatek,mt8183-topckgensysconsyscon@10001000 mediatek,mt8183-infracfgsyscon|)syscon@10003000mediatek,mt8183-pericfgsyscon0Kpinctrl@10005000mediatek,mt8183-pinctrlPDiocfg0iocfg1iocfg2iocfg3iocfg4iocfg5iocfg6iocfg7iocfg8eint*^ M*i2c0<pins_i2cRSi2c1Gpins_i2cQTi2c2>pins_i2cghi2c3Fpins_i2c23i2c4=pins_i2ciji2c5Hpins_i2c01i2c6;pins_cmd_datqrkeyboard1pins_keyboard [\]mmc0-pins-defaultNpins_cmd_dat${}~zpins_clk| pins_rstmmc0-pins-uhsOpins_cmd_dat${}~zpins_clk| pins_ds pins_rstmmc1-pins-defaultRpins_cmd_dat "! pins_clk pins_pmu&mmc1-pins-uhsSpins_cmd_dat "! pins_clk syscon@10006000)mediatek,mt8183-scpsyssysconsimple-mfd`power-controller!mediatek,mt8183-power-controller+2Epower-domain@0 )/)7audioaudio1audio22power-domain@1F)2power-domain@2mfg+2power-domain@3+2X+power-domain@42power-domain@52power-domain@6F)2power-domain@7X,,,,,,,,,, 5mmmm-0mm-1mm-2mm-3mm-4mm-5mm-6mm-7mm-8mm-9F)f-+2power-domain@8@.. ......camcam-0cam-1cam-2cam-3cam-4cam-5cam-6F)f-2power-domain@9 "/ /ispisp-0isp-1F)f-2power-domain@10 f-2power-domain@11 f-2power-domain@12 @&#000000-vpuvpu1vpu-0vpu-1vpu-2vpu-3vpu-4vpu-5F)f-+2power-domain@13 $vpu2F)2power-domain@14%vpu3F)2watchdog@10007000mediatek,mt8183-wdtp|Lsyscon@1000c000"mediatek,mt8183-apmixedsyssysconBpwrap@1000d000mediatek,mt8183-pwrappwrap )) spiwrapmt6358mediatek,mt6358^ *Mmt6358codecmediatek,mt6358-soundsmt6358regulatormediatek,mt6358-regulatorbuck_vdram1vdram1 L0 buck_vcorevcore j buck_vpavpa 7P buck_vproc11vproc11 j $buck_vproc12vproc12 j !buck_vgpuvgpu j +buck_vs2vs2 L0buck_vmodemvmodem j buck_vs1vs1B@'{l0ldo_vdram2vdram2 'w@ ldo_vsim1vsim1/M`ldo_vibrvibrO2Z<ldo_vrf12regulator-fixedvrf12OOxldo_vio18regulator-fixedvio18w@w@ Qldo_vusbvusb-/M`ldo_vcamioregulator-fixedvcamiow@w@Eldo_vcamdvcamd w@Eldo_vcn18regulator-fixedvcn18w@w@ldo_vfe28regulator-fixedvfe28**ldo_vsram_proc11 vsram_proc11 jldo_vcn28regulator-fixedvcn28**ldo_vsram_others vsram_others jldo_vsram_gpu vsram_gpu jYldo_vxo22regulator-fixedvxo22!!xldo_vefusevefuseldo_vaux18regulator-fixedvaux18w@w@ldo_vmchvmch,@ 2Z<Tldo_vbif28regulator-fixedvbif28**ldo_vsram_proc12 vsram_proc12 jldo_vcama1vcama1w@-Eldo_vemcvemc,@ 2Z<Pldo_vio28regulator-fixedvio28**ldo_va12regulator-fixedva12OOldo_vrf18regulator-fixedvrf18w@w@xldo_vcn33_bt vcn33_bt2Z5gldo_vcn33_wifi vcn33_wifi2Z5gldo_vcama2vcama2w@-Eldo_vmcvmcw@2Z<Uldo_vldo28vldo28*-ldo_vaud28regulator-fixedvaud28**ldo_vsim2vsim2/M`mt6358rtcmediatek,mt6358-rtcmt6358keysmediatek,mt6358-keyspower"t1home"fkeyboard@10010000mediatek,mt6779-keypad (kpdFokay?defaultM1Wrsdt scp@10500000mediatek,mt8183-scp P\ sramcfg )main2Fokaytimer@10017000,mediatek,mt8183-timermediatek,mt6765-timerp 3iommu@10205000mediatek,mt8183-m4u P 456789:[mailbox@10238000mediatek,mt8183-gce#@ )gceZauxadc@11001000.mediatek,mt8183-auxadcmediatek,mt8173-auxadc)#mainFokayAserial@11002000*mediatek,mt8183-uartmediatek,mt6577-uart  [ () baudbusFokayserial@11003000*mediatek,mt8183-uartmediatek,mt6577-uart0 \ () baudbus Fdisabledserial@11004000*mediatek,mt8183-uartmediatek,mt6577-uart@ ] () baudbus Fdisabledi2c@11005000mediatek,mt8183-i2c P W)W)* maindma+Fokay?defaultM;/i2c@11007000mediatek,mt8183-i2c p Q) )* maindma+Fokay?defaultM</i2c@11008000mediatek,mt8183-i2c  R) )*)G maindmaarb+Fokay?defaultM=/i2c@11009000mediatek,mt8183-i2c  S) )*)I maindmaarb+Fokay?defaultM>/spi@1100a000mediatek,mt8183-spi+ x6)parent-clksel-clkspi-clk Fdisabledsvs@1100b000mediatek,mt8183-svs ) main?@(svs-calibration-datat-calibration-datathermal@1100b000mediatek,mt8183-thermal) )# thermauxadc,) L3ACB@calibration-dataCthermal-zonescpu-thermalWdm{Ctripstrip-point0  passivetrip-point18 passiveDcpu-crit8  criticalcooling-mapsmap0D0 map1D0tzts1Wm{Ctripscooling-mapstzts2Wm{Ctripscooling-mapstzts3Wm{Ctripscooling-mapstzts4Wm{Ctripscooling-mapstzts5Wm{Ctripscooling-mapstztsABBWm{Ctripscooling-mapspwm@1100e000mediatek,mt8183-disp-pwm E)5mainmmpwm@11006000mediatek,mt8183-pwm`0))))))topmainpwm1pwm2pwm3pwm4i2c@1100f000mediatek,mt8183-i2c  T) )* maindma+Fokay?defaultMF/spi@11010000mediatek,mt8183-spi+ |6)8parent-clksel-clkspi-clk Fdisabledi2c@11011000mediatek,mt8183-i2c  U)9)* maindma+Fokay?defaultMG/spi@11012000mediatek,mt8183-spi+  6);parent-clksel-clkspi-clk Fdisabledspi@11013000mediatek,mt8183-spi+0 6)<parent-clksel-clkspi-clk Fdisabledi2c@11014000mediatek,mt8183-i2c @ )H)*)G maindmaarb+ Fdisabledi2c@11015000mediatek,mt8183-i2c P )J)*)I maindmaarb+ Fdisabledi2c@11016000mediatek,mt8183-i2c ` V)D)*)E maindmaarb+Fokay?defaultMH/i2c@11017000mediatek,mt8183-i2c p )F)*)E maindmaarb+ Fdisabledspi@11018000mediatek,mt8183-spi+ 6)Kparent-clksel-clkspi-clk Fdisabledspi@11019000mediatek,mt8183-spi+ 6)Lparent-clksel-clkspi-clk Fdisabledi2c@1101a000mediatek,mt8183-i2c  X)b)* maindma+ Fdisabledi2c@1101b000mediatek,mt8183-i2c  Y)c)* maindma+ Fdisabledusb@11201000#mediatek,mt8183-mtu3mediatek,mtu3  . > macippc HIJ)=)Zsys_ckref_ck K e+? Fdisabledusb@11200000'mediatek,mt8183-xhcimediatek,mtk-xhci mac I)=)Zsys_ckref_ck Fdisabledaudio-controller@11220000 mediatek,mt8183-audiosyssyscon"Mmt8183-afe-pcmmediatek,mt8183-audio ,L  audiosysEDMMMMM MMMMM M M M MM)/)7  0HLKOtuvwxyz{|}~(waud_afe_clkaud_dac_clkaud_dac_predis_clkaud_adc_clkaud_adc_adda6_clkaud_apll22m_clkaud_apll24m_clkaud_apll1_tuner_clkaud_apll2_tuner_clkaud_i2s1_bclk_swaud_i2s2_bclk_swaud_i2s3_bclk_swaud_i2s4_bclk_swaud_tdm_clkaud_tml_clkaud_infra_clkmtkaif_26m_clktop_mux_audiotop_mux_aud_intbustop_syspll_d2_d4top_mux_aud_1top_apll1_cktop_mux_aud_2top_apll2_cktop_mux_aud_eng1top_apll1_d8top_mux_aud_eng2top_apll2_d8top_i2s0_m_seltop_i2s1_m_seltop_i2s2_m_seltop_i2s3_m_seltop_i2s4_m_seltop_i2s5_m_seltop_apll12_div0top_apll12_div1top_apll12_div2top_apll12_div3top_apll12_div4top_apll12_divbtop_clk26m_clkmmc@11230000mediatek,mt8183-mmc # M))sourcehclksource_cgFokay?defaultstate_uhsMNO * 8JYhy(PQUmmc@11240000mediatek,mt8183-mmc $ N ))(sourcehclksource_cgFokay?defaultstate_uhsMRS * TU$1dsi-phy@11e50000mediatek,mt8183-mipi-txB: mipi_tx0_pllVcalibration-data\efuse@11f10000%mediatek,mt8183-efusemediatek,efuse+calib@180 @calib@190 Vcalib@580d?t-phy@11f40000.mediatek,mt8183-tphymediatek,generic-tphy-v2+?Fokayusb-phy@0(ref:EFokayIusb-phy@700 (ref:FokayJsyscon@13000000mediatek,mt8183-mfgcfgsysconWgpu@13040000&mediatek,mt8183-maliarm,mali-bifrost@$ UjobmmugpuWEEEecore0core1core2Xx+Ysyscon@14000000mediatek,mt8183-mmsyssyscon|ZZZ,mdp3-rdma0@14001000mediatek,mt8183-mdp3-rdmaZE, ,[ ZZmdp3-rsz0@14003000mediatek,mt8183-mdp3-rsz0Z0,mdp3-rsz1@14004000mediatek,mt8183-mdp3-rsz@Z@,mdp3-wrot0@14005000mediatek,mt8183-mdp3-wrotPZP!E,[mdp3-wdma@14006000mediatek,mt8183-mdp3-wdma`Z`"E,)[ovl@14008000mediatek,mt8183-disp-ovl E,[Zovl@14009000mediatek,mt8183-disp-ovl-2l E,[Zovl@1400a000mediatek,mt8183-disp-ovl-2l E,[Zrdma@1400b000mediatek,mt8183-disp-rdma E,[Zrdma@1400c000mediatek,mt8183-disp-rdma E,[Zcolor@1400e0006mediatek,mt8183-disp-colormediatek,mt8173-disp-color E,Zccorr@1400f000mediatek,mt8183-disp-ccorr E,Zaal@14010000mediatek,mt8183-disp-aal E,Zgamma@14011000mediatek,mt8183-disp-gamma E,Zdither@14012000mediatek,mt8183-disp-dither  E,Z dsi@14014000mediatek,mt8183-dsi@ E,, \enginedigitalhs,,\dphy Fdisabledmutex@14016000mediatek,mt8183-disp-mutex` EZ`larb@14017000mediatek,mt8183-smi-larbpf-,,Eapbsmi4smi@14019000mediatek,mt8183-smi-common ,,,,apbsmigals0gals1E-mdp3-ccorr@1401c000mediatek,mt8183-mdp3-ccorrZ1,+syscon@15020000mediatek,mt8183-imgsyssyscon/larb@15021000mediatek,mt8183-smi-larbf-/ / , apbsmigalsE 9larb@1502f000mediatek,mt8183-smi-larbf-//,  apbsmigalsE 6syscon@16000000mediatek,mt8183-vdecsyssyscon]larb@16010000mediatek,mt8183-smi-larbf-]]apbsmiE 5syscon@17000000mediatek,mt8183-vencsyssyscon^larb@17010000mediatek,mt8183-smi-larbf-^^apbsmiE 8venc_jpg@17030000+mediatek,mt8183-jpgencmediatek,mtk-jpgenc [[E ^jpgencsyscon@19000000 mediatek,mt8183-ipu_connsyscon0syscon@19010000mediatek,mt8183-ipu_adlsysconsyscon@19180000!mediatek,mt8183-ipu_core0sysconsyscon@19280000!mediatek,mt8183-ipu_core1syscon(syscon@1a000000mediatek,mt8183-camsyssyscon.larb@1a001000mediatek,mt8183-smi-larbf-.., apbsmigalsE:larb@1a002000mediatek,mt8183-smi-larb f-. . , apbsmigalsE7memory@40000000memory@chosenserial0:921600n8reserved-memory+?scp_mem_region@50000000shared-dma-poolP2leds gpio-ledsled-redred * offled-greengreen * offthermistormurata,ncp03wf104w@#p.;A compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9i2c10i2c11ovl0ovl-2l0ovl-2l1rdma0rdma1serial0opp-sharedphandleopp-hzopp-microvoltrequired-oppsclocksclock-namesoperating-points-v2cpudevice_typeregenable-methodcapacity-dmips-mhzcpu-idle-statesdynamic-power-coefficient#cooling-cellsmediatek,cciproc-supplyentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usinterrupts#clock-cellsclock-divclock-multclock-output-namesclock-frequencyrangesstatus#interrupt-cellsinterrupt-controlleraffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangespinmuxmediatek,pull-up-advmediatek,drive-strength-advinput-enabledrive-strengthmediatek,pull-down-advoutput-high#power-domain-cellsmediatek,infracfgdomain-supplymediatek,smimediatek,dmic-moderegulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-enable-ramp-delayregulator-always-onregulator-allowed-modeslinux,keycodeswakeup-sourcepinctrl-namespinctrl-0linux,keymapkeypad,num-rowskeypad,num-columnsdebounce-delay-msmediatek,keys-per-groupmemory-regionmediatek,larbs#iommu-cells#mbox-cells#io-channel-cellsnvmem-cellsnvmem-cell-names#thermal-sensor-cellsresetsmediatek,auxadcmediatek,apmixedsyspolling-delay-passivepolling-delaythermal-sensorssustainable-powertemperaturehysteresistripcooling-devicecontributionpower-domains#pwm-cellsphysmediatek,syscon-wakeupreset-namespinctrl-1bus-widthmax-frequencycap-mmc-highspeedmmc-hs200-1_8vmmc-hs400-1_8vcap-mmc-hw-resetno-sdiono-sdhs400-ds-delayvmmc-supplyvqmmc-supplyassigned-clocksassigned-clock-parentsnon-removablecap-sd-highspeedsd-uhs-sdr50sd-uhs-sdr104cap-sdio-irqno-mmckeep-power-in-suspend#phy-cellsmediatek,discthinterrupt-namespower-domain-namesmali-supplysram-supplymboxesmediatek,gce-client-regmediatek,gce-eventsiommusmediatek,rdma-fifo-sizephy-namesstdout-pathno-maplabelgpiosdefault-statepullup-uvpullup-ohmpulldown-ohmio-channels