682(2|&mediatek,mt7986b-rfbmediatek,mt7986b +7MediaTek MT7986b RFB =embeddedoscillator-40m fixed-clockJbZZgclkxtalzcpus+cpu@0cpuarm,cortex-a53pscicpu@1cpuarm,cortex-a53pscicpu@2cpuarm,cortex-a53pscicpu@3cpupsciarm,cortex-a53psci arm,psci-0.2smcreserved-memory+secmon@43000000Cwmcpu-reserved@4fc00000Oz"wo-emi@4fd00000Ozwo-emi@4fd40000Ozwo-ilm@151e0000zwo-ilm@151f0000zwo-data@4fd80000O$zwo-dlm@151e8000 zwo-dlm@151f8000 zwo-boot@15194000@ztimerarm,armv8-timer 0   soc+ simple-businterrupt-controller@c000000 arm,gic-v3 P   @ A B   zinfracfg@10001000 mediatek,mt7986-infracfgsysconZzwed-pcie@10003000 mediatek,mt7986-wed-pciesyscon0ztopckgen@1001b000 mediatek,mt7986-topckgensysconZzwatchdog@1001c000mediatek,mt7986-wdt n disabledz!apmixedsys@1001e000mediatek,mt7986-apmixedsysZzpinctrl@1001f000mediatek,mt7986b-pinctrl@gpioiocfg_rtiocfg_rbiocfg_ltiocfg_lbiocfg_triocfg_tleint  ()BB#  zspi-flash-pinszmux4spi=spi0spi0_wp_holdspic-pinszmux4spi=spi1_2wf-2g-5g-pinsz#mux4wifi =wf_2gwf_5gconfDWF0_HB1WF0_HB2WF0_HB3WF0_HB4WF0_HB0WF0_HB0_BWF0_HB5WF0_HB6WF0_HB7WF0_HB8WF0_HB9WF0_HB10WF0_TOP_CLKWF0_TOP_DATAWF1_HB1WF1_HB2WF1_HB3WF1_HB4WF1_HB0WF1_HB5WF1_HB6WF1_HB7WF1_HB8WF1_TOP_CLKWF1_TOP_DATAIwf-dbdc-pinsz$mux4wifi=wf_dbdcconf|DWF0_HB1WF0_HB2WF0_HB3WF0_HB4WF0_HB0WF0_HB0_BWF0_HB5WF0_HB6WF0_HB7WF0_HB8WF0_HB9WF0_HB10WF0_TOP_CLKWF0_TOP_DATAIsyscon@10060000"mediatek,mt7986-sgmiisys_0sysconZzsyscon@10070000"mediatek,mt7986-sgmiisys_1sysconZzrng@1020f000(mediatek,mt7986-rngmediatek,mt7623-rng X7_rng disabledcrypto@10320000inside-secure,safexcel-eip9720tuvwkring0ring1ring2ring3X{3okaypwm@10048000mediatek,mt7986-pwm  X  _topmainpwm1pwm2 disabledserial@11002000*mediatek,mt7986-uartmediatek,mt6577-uart  {X _baudbus{okayserial@11003000*mediatek,mt7986-uartmediatek,mt6577-uart0 |X _baudbus{6 disabledserial@11004000*mediatek,mt7986-uartmediatek,mt6577-uart@ }X _baudbus{6 disabledi2c@11008000mediatek,mt7986-i2c !p X _maindma+ disabledspi@1100a000)mediatek,mt7986-spi-ipmmediatek,spi-ipm+  X#% _parent-clksel-clkspi-clkhclkokaydefaultflash@0 spi-nandspi@1100b000)mediatek,mt7986-spi-ipmmediatek,spi-ipm+  X$& _parent-clksel-clkspi-clkhclkokaydefaultadc@1100d000mediatek,mt7986-auxadcX,_main  disabledz usb@11200000'mediatek,mt7986-xhcimediatek,mtk-xhci  . > macippc (X12/0;$_sys_ckref_ckmcu_ckdma_ckxhci_ck  okaymmc@11230000mediatek,mt7986-mmc # {#"(X#)(*+%_sourcehclksource_cgbus_clksys_cg disabledthermal@1100c800#mediatek,mt7986-thermal X,-_thermauxadcadc_32k9 I] icalibration-dataz%pcie@11280000*mediatek,mt7986-pciemediatek,mt8192-pciepci+(@ pcie-mac z  X4356!_pl_250mtl_26mperi_26mtop_133m disabled  pcie-phy`interrupt-controllerzt-phy.mediatek,mt7986-tphymediatek,generic-tphy-v2+ disabledpcie-phy@11c00000X_refz efuse@11d00000%mediatek,mt7986-efusemediatek,efuse+calib@274t z t-phy@11e10000.mediatek,mt7986-tphymediatek,generic-tphy-v2+okayusb-phy@0X<= _refda_refzusb-phy@700 X5_refz usb-phy@1000X<= _refda_refz syscon@15000000+mediatek,mt7986-ethsyssysconZzwed@15010000mediatek,mt7986-wedsyscon  %wo-emiwo-ilmwo-dlmwo-datawo-bootzwed@15011000mediatek,mt7986-wedsyscon  %wo-emiwo-ilmwo-dlmwo-datawo-bootzsyscon@151a5000mediatek,mt7986-wo-ccifsysconP  zsyscon@151ad000mediatek,mt7986-wo-ccifsyscon  zethernet@15100000mediatek,mt7986-eth0xX+,_fegp2gp1wocpu1wocpu0sgmii_tx250msgmii_rx250msgmii_cdr_refsgmii_cdr_fbsgmii2_tx250msgmii2_rx250msgmii2_cdr_refsgmii2_cdr_fbnetsys0netsys1{./!+okaymac@0mediatek,eth-mac .2500base-xz fixed-link7 =Imdio-bus+switch@0mediatek,mt7531 Oports+port@0[lan0port@1[lan1port@2[lan2port@3[lan3port@4[lan4port@6[cpua  .2500base-xfixed-link7 =Iwifi@18000000mediatek,mt7986-wmacj!qconsysX2> _mcuap2conn000"okay defaultdbdc#}$thermal-zonescpu-thermal%tripscritH EcriticalhotEhotactive-high8Eactiveactive-medLEactiveactive-low`Eactivealiases/soc/serial@11002000chosenserial0:115200n8memory@40000000memory@@ compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typeclock-frequency#clock-cellsclock-output-namesphandledevice_typeenable-methodreg#cooling-cellsrangesno-mapinterrupts#interrupt-cellsinterrupt-controller#reset-cellsstatusreg-namesgpio-controller#gpio-cellsgpio-rangesfunctiongroupspinsdrive-strengthclocksclock-namesinterrupt-namesassigned-clocksassigned-clock-parents#pwm-cellsclock-divpinctrl-namespinctrl-0cs-gpiosspi-max-frequencyspi-tx-bus-widthspi-rx-bus-width#io-channel-cellsphys#thermal-sensor-cellsmediatek,auxadcmediatek,apmixedsysnvmem-cellsnvmem-cell-namesbus-rangephy-namesinterrupt-map-maskinterrupt-map#phy-cellsmemory-regionmemory-region-namesmediatek,wo-ccifmediatek,ethsysmediatek,sgmiisysmediatek,wed-pciemediatek,wedphy-modespeedfull-duplexpausereset-gpioslabelethernetresetsreset-namespinctrl-1polling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisserial0stdout-path