8 ( leez,p710rockchip,rk3399 +7Leez RK3399 P710aliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/mmc@fe310000/mmc@fe320000/mmc@fe330000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid  4 ?cpu@1cpuarm,cortex-a53pscid  4 ?cpu@2cpuarm,cortex-a53pscid  4 ?cpu@3cpuarm,cortex-a53pscid  4 ?cpu@100cpuarm,cortex-a72psci   4?thermal-idleG'Scpu@101cpuarm,cortex-a72psci   4?thermal-idleG'Sidle-statescpscicpu-sleeparm,idle-statepxS? cluster-sleeparm,idle-statepS? display-subsystemrockchip,display-subsystemmemory-controllerrockchip,rk3399-dmcdmc_clk disabledpmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6!xin24m4?pcie@f8000000rockchip,rk3399-pcie Aaxi-baseapb-basepci+K\h Gaclkaclk-perfhclkpm0123rsyslegacyclient` ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38ɂ8(coremgmtmgmt-stickypipepmpclkaclk disabledinterrupt-controllerK?pcie-ep@f8000000rockchip,rk3399-pcie-ep Aapb-basemem-base Gaclkaclk-perfhclkpm8(coremgmtmgmt-stickypipepmpclkaclk ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3 .default< disabledethernet@fe300000rockchip,rk3399-gmac0 rmacirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macF stmmacethTaokayl|inputrgmii.default<  'P(mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@р Mbiuciuciu-driveciu-sampleFyresetokay+$1BXc.default < !"qwifi@1brcm,bcm4329-fmac # rhost-wake.default<$mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@Aрl  Lbiuciuciu-driveciu-sampleFzresetokay1 #.default<%&'(mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 lN Nclk_xinclk_ahb!emmc_cardclock4) phy_arasanFokayc?usb@fe380000 generic-ehci8*+usbokayusb@fe3a0000 generic-ohci:*+usbokayusb@fe3c0000 generic-ehci<,-usbokayusb@fe3e0000 generic-ohci> ,-usbokaydebug@fe430000&arm,coresight-cpu-debugarm,primecellCM apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL apb_pclkusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otgokayusb@fe800000 snps,dwc3irefbus_earlysuspend otg./usb2-phyusb3-phy utmi_wide3TmFokayusb@fe900000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otgokayusb@fe900000 snps,dwc3nrefbus_earlysuspend host01usb2-phyusb3-phy utmi_wide3TmFokaydp@fec00000rockchip,rk3399-cdn-dp lr  ruocore-clkpclkspdifgrf23F HJspdifdptxapbcoreT disabledportsport+endpoint@04?endpoint@15?interrupt-controller@fee00000 arm,gic-v3K+P  ?msi-controller@fee20000arm,gic-v3-its?ppi-partitionsinterrupt-partition-0?interrupt-partition-1?saradc@ff100000rockchip,rk3399-saradc>Pesaradcapb_pclk saradc-apbokay6crypto@ff8b0000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2clA AU i2cpclk;.default<7+okay,)i2c@ff120000rockchip,rk3399-i2clB BV i2cpclk#.default<8+ disabledi2c@ff130000rockchip,rk3399-i2clC CW i2cpclk".default<9+okay)i2c@ff140000rockchip,rk3399-i2clD DX i2cpclk&.default<:+ disabledi2c@ff150000rockchip,rk3399-i2clE EY i2cpclk%.default<;+ disabledi2c@ff160000rockchip,rk3399-i2clF FZ i2cpclk$.default<<+okay?serial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkcAK.default <=>?okaybluetoothbrcm,bcm43438-bt@ ext_clock XA l# ~# .default <BCDserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkbAK.default<E disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkdAK.default<Fokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclkeAK.default<G disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkDH H txrx.default<IJKL+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk5H H txrx.default<MNOP+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4HHtxrx.default<QRST+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkCHHtxrx.default<UVWX+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclkYY txrx.default<Z[\]F+ disabledthermal-zonescpu-thermald^tripscpu_alert0ppassive?_cpu_alert1$passive?`cpu_crits criticalcooling-mapsmap0_map1`Hgpu-thermald^tripsgpu_alert0$passive?agpu_crits criticalcooling-mapsmap0a btsadc@ff260000rockchip,rk3399-tsadc&alO qOdtsadcapb_pclk tsadc-apbTs.initdefaultsleep<cdc&okay<S?^qos@ffa58000rockchip,rk3399-qossyscon ?lqos@ffa5c000rockchip,rk3399-qossyscon ?mqos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon ?pqos@ffa70080rockchip,rk3399-qossyscon ?qqos@ffa74000rockchip,rk3399-qossyscon@ ?nqos@ffa76000rockchip,rk3399-qossyscon` ?oqos@ffa90000rockchip,rk3399-qossyscon ?rqos@ffa98000rockchip,rk3399-qossyscon ?eqos@ffaa0000rockchip,rk3399-qossyscon ?sqos@ffaa0080rockchip,rk3399-qossyscon ?tqos@ffaa8000rockchip,rk3399-qossyscon ?uqos@ffaa8080rockchip,rk3399-qossyscon ?vqos@ffab0000rockchip,rk3399-qossyscon ?fqos@ffab0080rockchip,rk3399-qossyscon ?gqos@ffab8000rockchip,rk3399-qossyscon ?hqos@ffac0000rockchip,rk3399-qossyscon ?iqos@ffac0080rockchip,rk3399-qossyscon ?jqos@ffac8000rockchip,rk3399-qossyscon ?wqos@ffac8080rockchip,rk3399-qossyscon ?xqos@ffad0000rockchip,rk3399-qossyscon ?yqos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon ?kpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controllern+?power-domain@34"enpower-domain@33!fgnpower-domain@31hnpower-domain@32  ijnpower-domain@35#knpower-domain@25lnpower-domain@23lnpower-domain@22fmnpower-domain@27Lnnpower-domain@28onpower-domain@8~}npower-domain@9 npower-domain@24pqnpower-domain@15n+power-domain@21rrnpower-domain@19stnpower-domain@20uvnpower-domain@16n+power-domain@17wxnpower-domain@18ynsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2?io-domains&rockchip,rk3399-pmu-io-voltage-domainokayzspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5{{spiclkapb_pclk<.default<|}~+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7{{"baudclkapb_pclkfAK.default< disabledi2c@ff3c0000rockchip,rk3399-i2c<l{  { { i2cpclk9.default<+okay)pmic@1brockchip,rk808 4!xin32krk808-clkout2.default<'4AN6?@regulatorsDCDC_REG1 [vdd_centerj~ qpqregulator-state-memDCDC_REG2 [vdd_cpu_lj~ qpq? regulator-state-memDCDC_REG3[vcc_ddrj~regulator-state-memDCDC_REG4[vcc_1v8j~w@w@?6regulator-state-mem w@LDO_REG1 [vcc1v8_dvpj~w@w@?regulator-state-memLDO_REG2 [vcc1v8_hdmij~w@w@regulator-state-memLDO_REG3 [vcca_1v8j~w@w@regulator-state-mem w@LDO_REG4 [vccio_sdj~--?regulator-state-mem -LDO_REG5[vcca3v0_codecj~--regulator-state-memLDO_REG6[vcc_1v5j~``regulator-state-mem `LDO_REG7 [vcc0v9_hdmij~  regulator-state-memLDO_REG8[vcc_3v0j~--?zregulator-state-mem -regulator@40silergy,syr827@ ".default< [vdd_cpu_b 4`j~ ??regulator-state-memregulator@41silergy,syr828A ".default<[vdd_gpu 4`j~ ??regulator-state-memi2c@ff3d0000rockchip,rk3399-i2c=l{  { { i2cpclk8.default<+okayX)i2c@ff3e0000rockchip,rk3399-i2c>l{  { { i2cpclk:.default<+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB J.default<{ disabledpwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB J.default<{ disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  J.default<{okay?pwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 J.default<{ disableddfi@ff630000c@rockchip,rk3399-dfiy pclk_ddr_mon disabled?video-codec@ff650000rockchip,rk3399-vpue rq rvepuvdpu aclkhclk UFiommu@ff650800rockchip,iommue@s aclkiface \F?video-codec@ff660000rockchip,rk3399-vdecft axiahbcabaccore UF iommu@ff660480rockchip,iommu f@f@u aclkifaceF  \?iommu@ff670800rockchip,iommug@* aclkiface \ disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkjgi coreaxiahbF!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@  i t apb_pclk?Ydma-controller@ff6e0000arm,pl330arm,primecelln@  i t apb_pclk?Hclock-controller@ff750000rockchip,rk3399-pmucruuxin24mT4 l{(J?{clock-controller@ff760000rockchip,rk3399-cruvxin24mT4 l@BCxD#g/;рxh<4`#Fׄׄ ׄ?syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+?io-domains"rockchip,rk3399-io-voltage-domainokay  6  zmipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrfF  disabled?usb2phy@e450rockchip,rk3399-usb2phyP{phyclk4!clk_usbphy0_480mokay?*host-port  rlinestateokay?+otg-port 0ghjrotg-bvalidotg-idlinestateokay?.usb2phy@e460rockchip,rk3399-usb2phy`|phyclk4!clk_usbphy1_480mokay?,host-port  rlinestateokay?-otg-port 0lmorotg-bvalidotg-idlinestateokay?0phy@f780rockchip,rk3399-emmc-phy$emmcclk 2 okay?)pcie-phyrockchip,rk3399-pcie-phyrefclk phy disabled?phy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-refl~FLuphyuphy-pipeuphy-tcphyTokaydp-port ?2usb3-port ?/phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-reflF Muphyuphy-pipeuphy-tcphyTokaydp-port ?3usb3-port ?1watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifBYtx mclkhclkU.default<F disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2sT'YYtxrxi2s_clki2s_hclkV.bclk_onbclk_off<Fokay  i2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(YYtxrxi2s_clki2s_hclkW.default<Fokay  i2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)YYtxrxi2s_clki2s_hclkXFokay?vop@ff8f0000rockchip,rk3399-vop-lit wlׄaclk_vopdclk_vophclk_vop UF axiahbdclkokayport+?endpoint@0?endpoint@1?endpoint@2?endpoint@3?endpoint@4?5iommu@ff8f3f00rockchip,iommu?w aclkifaceF \okay?vop@ff900000rockchip,rk3399-vop-big vlׄaclk_vopdclk_vophclk_vop UF axiahbdclkokayport+?endpoint@0?endpoint@1?endpoint@2?endpoint@3?endpoint@4?4iommu@ff903f00rockchip,iommu?v aclkifaceF \okay?isp0@ff910000rockchip,rk3399-cif-isp@+nispaclkhclk UdphyF disabledports+port@0+iommu@ff914000rockchip,iommu @P+ aclkiface \F #?isp1@ff920000rockchip,rk3399-cif-isp@,oispaclkhclk UdphyF disabledports+port@0+iommu@ff924000rockchip,iommu @P, aclkiface \F #?hdmi-soundsimple-audio-card >i2s W qhdmi-soundokaysimple-audio-card,cpu simple-audio-card,codec hdmi@ff940000rockchip,rk3399-dw-hdmi(tqpoiahbisfrcecgrfrefFKTokay .default<?portsport+endpoint@0?endpoint@1?dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrfFapbT+ disabledports+port@0+endpoint@0?endpoint@1?port@1dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrfFapbT+  disabled?ports+port@0+endpoint@0?endpoint@1?port@1dp@ff970000rockchip,rk3399-edp jlo dppclkgrf.default<FdpT disabledports+port@0+endpoint@0?endpoint@1?port@1gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 rjobmmugpuF#okay  ?bpinctrlrockchip,rk3399-pinctrlT+gpio@ff720000rockchip,gpio-bankr{  K?#gpio@ff730000rockchip,gpio-banks{  K?gpio@ff780000rockchip,gpio-bankxP  K?Agpio@ff788000rockchip,gpio-bankxQ  K?gpio@ff790000rockchip,gpio-bankyR  Kpcfg-pull-up ?pcfg-pull-down ?pcfg-pull-none ?pcfg-pull-none-12ma  ?pcfg-pull-none-13ma  ?pcfg-pull-none-18ma  pcfg-pull-none-20ma  pcfg-pull-up-2ma  pcfg-pull-up-8ma  pcfg-pull-up-18ma  pcfg-pull-up-20ma  pcfg-pull-down-4ma  pcfg-pull-down-8ma  pcfg-pull-down-12ma  pcfg-pull-down-18ma  pcfg-pull-down-20ma  pcfg-output-high pcfg-output-low pcfg-input-enable pcfg-input-pull-up  pcfg-input-pull-down  clockclk-32k "cifcif-clkin " cif-clkouta " edpedp-hpd "?gmacrgmii-pins "    ?rmii-pins "     i2c0i2c0-xfer "?i2c1i2c1-xfer "?7i2c2i2c2-xfer "?8i2c3i2c3-xfer "?9i2c4i2c4-xfer "  ?i2c5i2c5-xfer "  ?:i2c6i2c6-xfer "  ?;i2c7i2c7-xfer "?<i2c8i2c8-xfer "?i2s0i2s0-2ch-bus` "i2s0-2ch-bus-bclk-off` "i2s0-8ch-bus "?i2s0-8ch-bus-bclk-off "?i2s1i2s1-2ch-busP "?i2s1-2ch-bus-bclk-offP "sdio0sdio0-bus1 "sdio0-bus4@ "? sdio0-cmd "?!sdio0-clk "?"sdio0-cd "sdio0-pwr "sdio0-bkpwr "sdio0-wp "sdio0-int "sdmmcsdmmc-bus1 "sdmmc-bus4@ "   ?(sdmmc-clk " ?%sdmmc-cmd " ?'sdmmc-cd "?&sdmmc-wp "suspendap-pwroff "ddrio-pwroff "spdifspdif-bus "?spdif-bus-1 "spi0spi0-clk "?Ispi0-cs0 "?Lspi0-cs1 "spi0-tx "?Jspi0-rx "?Kspi1spi1-clk " ?Mspi1-cs0 " ?Pspi1-rx "?Ospi1-tx "?Nspi2spi2-clk " ?Qspi2-cs0 " ?Tspi2-rx " ?Sspi2-tx " ?Rspi3spi3-clk "?|spi3-cs0 "?spi3-rx "?~spi3-tx "?}spi4spi4-clk "?Uspi4-cs0 "?Xspi4-rx "?Wspi4-tx "?Vspi5spi5-clk "?Zspi5-cs0 "?]spi5-rx "?\spi5-tx "?[testclktest-clkout0 "test-clkout1 "test-clkout2 "tsadcotp-pin "?cotp-out "?duart0uart0-xfer "?=uart0-cts "?>uart0-rts "??uart1uart1-xfer "  ?Euart2auart2a-xfer " uart2buart2b-xfer "uart2cuart2c-xfer "?Fuart3uart3-xfer "?Guart3-cts "uart3-rts "uart4uart4-xfer "?uarthdcpuarthdcp-xfer "pwm0pwm0-pin "?pwm0-pin-pull-down "vop0-pwm-pin "vop1-pwm-pin "pwm1pwm1-pin "?pwm1-pin-pull-down "pwm2pwm2-pin "?pwm2-pin-pull-down "pwm3apwm3a-pin "?pwm3bpwm3b-pin "hdmihdmi-i2c-xfer "hdmi-cec "?pciepci-clkreqn-cpm "pci-clkreqnb-cpm "?btbt-reg-on-h " ?Dbt-host-wake-l "?Bbt-wake-l "?Cpmicpmic-int-l "?vsel1-pin "?vsel2-pin "?usb2vcc5v0-host3-en "?wifiwifi-reg-on-h " ?wifi-host-wake-l "?$opp-table-0operating-points-v2 0? opp00 ;Q B  P@opp01 ;#F B opp02 ;0, B P Popp03 ;< BHHopp04 ;G BB@B@opp05 ;Tfr B**opp-table-1operating-points-v2 0? opp00 ;Q B  P@opp01 ;#F B opp02 ;0, B opp03 ;< B Y Yopp04 ;G B~~opp05 ;Tfr Bopp06 ;_" Bopp07 ;kI BOOopp-table-2operating-points-v2?opp00 ;  B 0opp01 ;@ B 0opp02 ;ׄ B 0opp03 ;e B Y Y0opp04 ;#F BHH0opp05 ;/ B0chosen aserial2:1500000n8external-gmac-clock fixed-clocksY@ !clkin_gmac4?sdio-pwrseqmmc-pwrseq-simple@ ext_clock.default< m# ?dc5v-adpregulator-fixed [dc5v_adapterj~LK@LK@?vcc3v3-lanregulator-fixed [vcc3v3_lanj~2Z2Z ??vcc3v3-sysregulator-fixed [vcc3v3_sysj~2Z2Z ??vcc5v0-hostregulator-fixed [vcc5v0_host~jS`S` ??vcc5v0-host3regulator-fixed [vcc5v0_host3 y A.default<j ?vcc5v0-sysregulator-fixed [vcc5v0_sysj~LK@LK@ ??vdd-logpwm-regulator a [vdd_logj~ 5\ compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllermax-functionsnum-lanesrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wparasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathreset-gpiosenable-active-highpwmspwm-supply