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modelcompatibleinterrupt-parent#address-cells#size-cells#clock-cellsclock-frequencyclock-output-namesphandleregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-ondebounce-intervalwakeup-sourcelinux,codelabelgpiosranges#interrupt-cellsinterrupt-map-maskinterrupt-maparm,hbiarm,vexpress,siteregbank-widthstatusinterruptsphy-modereg-io-widthsmsc,irq-active-highsmsc,irq-push-pullclocksvdd33a-supplyvddvario-supplyclock-namesassigned-clocksassigned-clock-parentsoffsetlinux,default-triggerdefault-statemax-frequencyvmmc-supplygpio-controller#gpio-cellsinterrupt-controllerframe-number#mbox-cells#iommu-cells#global-interruptspower-domainsdma-coherentmsi-controllerremote-endpointiommusarm,scatter-gatherreg-namescpuarm,cs-dev-assocarm,trig-in-sigsarm,trig-in-typesarm,trig-out-sigsarm,trig-out-typesarm,trig-conn-nameinterrupt-namesdevice_typebus-rangelinux,pci-domaindma-rangesmsi-parentiommu-map-maskiommu-mapmboxesshmemclock-indicesnum-domains#power-domain-cells#thermal-sensor-cellspolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresis#dma-cellsi2c-sda-hold-time-nsserial0stdout-pathmethodentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-usenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-idle-statescapacity-dmips-mhzcache-unifiedcache-levelinterrupt-affinity