8`(U(Marvell RD-AC5X Board)marvell,rd-ac5xmarvell,ac5xmarvell,ac5"1cpus"1cpu-mapcluster0core0=core1=cpu@0Acpuarm,cortex-a55MQpsci_pcpu@1Acpuarm,cortex-a55MQpsci_pl2-cachecacheppsci arm,psci-0.2Xsmctimerarm,armv8-timer0x  pmuarm,armv8-pmuv3 x soc simple-bus"1internal-regs@7f000000"1 simple-busserial@12000snps,dw-apb-uartM  xSokayserial@12100snps,dw-apb-uartM! xT disabledserial@12200snps,dw-apb-uartM" xU disabledserial@12300snps,dw-apb-uartM# xV disabledmdio@22004"1marvell,orion-mdioM ethernet-phy@0Mp i2c@11000marvell,mv78230-i2cM "1core xW defaultgpio  okayi2c@11100marvell,mv78230-i2cM "1core xX defaultgpio    okaygpio@18100marvell,orion-gpioM@  0< H[p0xKLMNpgpio@18140M@@marvell,orion-gpio 0< H[pxOPbehind-32bit-controller@7f000000 simple-bus"1ethernet@20000marvell,armada-ac5-netaM@ x-sgmiiokay ethernet@24000marvell,armada-ac5-netaM@@ x7sgmii disabledusb@80000marvell,orion-ehciM xCokayusb@a0000marvell,orion-ehciM  xEokay usb-phy peripheralpinctrl@80020100marvell,ac5-pinctrlM p i2c0-pins mpp26mpp27i2c0pi2c0-gpio-pins mpp26mpp27gpiopi2c1-pins mpp20mpp21i2c1p i2c1-gpio-pins mpp20mpp21i2c1p spi@805a0000marvell,armada-3700-spiMZP"1 xZokayflash@0jedec,spi-norM"1partition@0spi_flash_part0Mparition@1spi_flash_part1Mpparition@2spi_flash_part2Mspi@805a8000marvell,armada-3700-spiMZP"1 x[ disabledinterrupt-controller@80600000 arm,gic-v3p[ M`f xpclockscnm-clock fixed-clock _@pspi-clock fixed-clock  paliases)/soc/internal-regs@7f000000/serial@12000 /soc/spi@805a0000/flash@0'*/soc/internal-regs@7f000000/gpio@18100'0/soc/internal-regs@7f000000/gpio@1814056/soc/behind-32bit-controller@7f000000/ethernet@200005@/soc/behind-32bit-controller@7f000000/ethernet@24000memory@0AmemoryM@usb-phyusb-nop-xceivJp  modelcompatibleinterrupt-parent#address-cells#size-cellscpudevice_typeregenable-methodnext-level-cachephandleinterruptsrangesdma-rangesdma-coherentreg-shiftreg-io-widthclocksstatusclock-namesclock-frequencypinctrl-namespinctrl-0pinctrl-1scl-gpiossda-gpiosngpiosgpio-controller#gpio-cellsgpio-rangesmarvell,pwm-offsetinterrupt-controller#interrupt-cellsphy-modephy-handlephysphy-namesdr_modemarvell,pinsmarvell,functionnum-csspi-max-frequencyspi-tx-bus-widthspi-rx-bus-widthlabel#clock-cellsserial0spiflash0gpio0gpio1ethernet0ethernet1#phy-cells