� ��48�( 4��$openailab,eaidk-610rockchip,rk3399 +7OPEN AI LAB EAIDK-610aliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000�/i2c@ff3e0000�/serial@ff180000�/serial@ff190000�/serial@ff1a0000�/serial@ff1b0000�/serial@ff370000�/spi@ff1c0000�/spi@ff1d0000�/spi@ff1e0000�/spi@ff350000�/spi@ff1f0000�/spi@ff200000�/ethernet@fe300000�/mmc@fe310000�/mmc@fe320000�/mmc@fe330000cpus+cpu-mapcluster0core0�core1�core2�core3�cluster1core0�core1�cpu@0�cpuarm,cortex-a53��psci �#2dL \�i@{���@��� � � �cpu@1�cpuarm,cortex-a53��psci �#2dL \�i@{���@��� � � �cpu@2�cpuarm,cortex-a53��psci �#2dL \�i@{���@��� � � �cpu@3�cpuarm,cortex-a53��psci �#2dL \�i@{���@��� � � �cpu@100�cpuarm,cortex-a72��psci  #2�L \�i@{���@�����thermal-idle#�'��cpu@101�cpuarm,cortex-a72��psci  #2�L \�i@{���@�����thermal-idle#�'��l2-cache-cluster0cache^k@}� l2-cache-cluster1cache^k@}�idle-states"pscicpu-sleeparm,idle-state/@Wx��h�� cluster-sleeparm,idle-state/@W���h�� display-subsystemrockchip,display-subsystemymemory-controllerrockchip,rk3399-dmc���dmc_clk �disabledpmu_a53arm,cortex-a53-pmu�pmu_a72arm,cortex-a72-pmu�psci arm,psci-1.0smctimerarm,armv8-timer@�   �xin24m fixed-clock�n6�xin24m���pcie@f8000000rockchip,rk3399-pcie ���axi-baseapb-base�pci+ ' ��G��aclkaclk-perfhclkpm0�1231syslegacyclientA`Tbq y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38����������8��������(�coremgmtmgmt-stickypipepmpclkaclk �disabledinterrupt-controller� �pcie-ep@f8000000rockchip,rk3399-pcie-ep ���apb-basemem-base ��G��aclkaclk-perfhclkpm��8��������(�coremgmtmgmt-stickypipepmpclkaclk y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3� �default� �disabledethernet@fe300000rockchip,rk3399-gmac��0� 1macirq8ighfj�fM�stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac�� �stmmaceth �okay+�;Rinput_jrgmii�default� s � �'�P�(�mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc��1@�@��р �M���biuciuciu-driveciu-sample��y�reset�okay+�������!"�default �"#$0wifi@1brcm,bcm4329-fmac� %� 1host-wake�default�&mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc��2@�A��р+�> �� �L���biuciuciu-driveciu-sample��z�reset�okay�S� e%n�default �'()mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1��3� y+N> ��N��clk_xinclk_ahb�emmc_cardclock�y* ~phy_arasan��okay�"��usb@fe380000 generic-ehci��8���+y,~usb�okayusb@fe3a0000 generic-ohci��:���+y,~usb�okayusb@fe3c0000 generic-ehci��<���-y.~usb�okayusb@fe3e0000 generic-ohci��>� ��-y.~usb�okaydebug@fe430000&arm,coresight-cpu-debugarm,primecell��CM �apb_pclk�debug@fe432000&arm,coresight-cpu-debugarm,primecell��C M �apb_pclk�debug@fe434000&arm,coresight-cpu-debugarm,primecell��C@M �apb_pclk�debug@fe436000&arm,coresight-cpu-debugarm,primecell��C`M �apb_pclk�debug@fe610000&arm,coresight-cpu-debugarm,primecell��aL �apb_pclk�debug@fe710000&arm,coresight-cpu-debugarm,primecell��qL �apb_pclk�usb@fe800000rockchip,rk3399-dwc3+�0������G�ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�% �usb3-otg�okayusb@fe800000 snps,dwc3����i����refbus_earlysuspend�otgy/0~usb2-phyusb3-phy �utmi_wide���$�okayFport+endpoint@0�V1��usb@fe900000rockchip,rk3399-dwc3+�0������G�ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�& �usb3-otg�okayusb@fe900000 snps,dwc3����n����refbus_earlysuspend�hosty23~usb2-phyusb3-phy �utmi_wide���$�okaydp@fec00000rockchip,rk3399-cdn-dp���� +r�>�� �� ru�o�core-clkpclkspdifgrfy45 �HJ��spdifdptxapbcoref �disabledportsport+endpoint@0�V6��endpoint@1�V7��interrupt-controller@fee00000 arm,gic-v3 +��P����� ������� �msi-controller@fee20000arm,gic-v3-itsw�����ppi-partitionsinterrupt-partition-0��interrupt-partition-1��saradc@ff100000rockchip,rk3399-saradc���>�Pe�saradcapb_pclk�� �saradc-apb�okay�8crypto@ff8b0000rockchip,rk3399-crypto���@�����hclk_masterhclk_slavesclk�����masterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto����@������hclk_masterhclk_slavesclk�����masterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2c��+A> ��AU �i2cpclk�;�default�9+�okay�,�audio-codec@1arealtek,rt5651�Y�mclk �: �% f��i2c@ff120000rockchip,rk3399-i2c��+B> ��BV �i2cpclk�#�default�;+ �disabledi2c@ff130000rockchip,rk3399-i2c��+C> ��CW �i2cpclk�"�default�<+�okay�����i2c@ff140000rockchip,rk3399-i2c��+D> ��DX �i2cpclk�&�default�=+ �disabledi2c@ff150000rockchip,rk3399-i2c��+E> ��EY �i2cpclk�%�default�>+ �disabledi2c@ff160000rockchip,rk3399-i2c��+F> ��FZ �i2cpclk�$�default�?+ �disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart��Q`�baudclkapb_pclk�c �default �@AB�okaybluetoothbrcm,bcm4345c5C�lpo D +% =% L�`�default �EFGVHbIserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uart��Ra�baudclkapb_pclk�b �default�J �disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart��Sb�baudclkapb_pclk�d �default�K�okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart��Tc�baudclkapb_pclk�e �default�L �disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi��G[�spiclkapb_pclk�DoM M ttxrx�default�NOPQ+ �disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi��H\�spiclkapb_pclk�5oM M ttxrx�default�RSTU+ �disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi��I]�spiclkapb_pclk�4oMMttxrx�default�VWXY+ �disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi��J^�spiclkapb_pclk�CoMMttxrx�default�Z[\]+ �disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi�� K_�spiclkapb_pclk��o^^ ttxrx�default�_`ab+ �disabledthermal-zonescpu-thermal~d���ctripscpu_alert0�p���passive�dcpu_alert1�$����passive�ecpu_crit�s�� �criticalcooling-mapsmap0�d�����������������map1�eH�������������������������������������������������gpu-thermal~d���ctripsgpu_alert0�$����passive�fgpu_crit�s�� �criticalcooling-mapsmap0�f �g��������tsadc@ff260000rockchip,rk3399-tsadc��&�a+O> q�Od�tsadcapb_pclk�� �tsadc-apb�s�initdefaultsleep�h�i�h�okay5�cqos@ffa58000rockchip,rk3399-qossyscon���� �qqos@ffa5c000rockchip,rk3399-qossyscon���� �rqos@ffa60080rockchip,rk3399-qossyscon���� qos@ffa60100rockchip,rk3399-qossyscon��� qos@ffa60180rockchip,rk3399-qossyscon���� qos@ffa70000rockchip,rk3399-qossyscon��� �uqos@ffa70080rockchip,rk3399-qossyscon���� �vqos@ffa74000rockchip,rk3399-qossyscon���@ �sqos@ffa76000rockchip,rk3399-qossyscon���` �tqos@ffa90000rockchip,rk3399-qossyscon��� �wqos@ffa98000rockchip,rk3399-qossyscon���� �jqos@ffaa0000rockchip,rk3399-qossyscon��� �xqos@ffaa0080rockchip,rk3399-qossyscon���� �yqos@ffaa8000rockchip,rk3399-qossyscon���� �zqos@ffaa8080rockchip,rk3399-qossyscon����� �{qos@ffab0000rockchip,rk3399-qossyscon��� �kqos@ffab0080rockchip,rk3399-qossyscon���� �lqos@ffab8000rockchip,rk3399-qossyscon���� �mqos@ffac0000rockchip,rk3399-qossyscon��� �nqos@ffac0080rockchip,rk3399-qossyscon���� �oqos@ffac8000rockchip,rk3399-qossyscon���� �|qos@ffac8080rockchip,rk3399-qossyscon����� �}qos@ffad0000rockchip,rk3399-qossyscon��� �~qos@ffad8080rockchip,rk3399-qossyscon����� qos@ffae0000rockchip,rk3399-qossyscon��� �ppower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd��1power-controller!rockchip,rk3399-power-controllerP+�power-domain@34�"��djPpower-domain@33�!��dklPpower-domain@31���dmPpower-domain@32�  ����dnoPpower-domain@35�#�dpPpower-domain@25�lPpower-domain@23��dqPpower-domain@22��fdrPpower-domain@27��LdsPpower-domain@28��dtPpower-domain@8�~}Ppower-domain@9� �Ppower-domain@24��duvPpower-domain@15�P+power-domain@21���rdwPpower-domain@19���dxyPpower-domain@20���dz{Ppower-domain@16�P+power-domain@17���d|}Ppower-domain@18���d~Psyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd��2�io-domains&rockchip,rk3399-pmu-io-voltage-domain�okaykspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi��5���spiclkapb_pclk�<�default�����+ �disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart��7��"�baudclkapb_pclk�f �default�� �disabledi2c@ff3c0000rockchip,rk3399-i2c��<+� > ��� � �i2cpclk�9�default��+�okaypmic@1brockchip,rk808� ���default��z���xin32krk808-clkout2�H�H�H�H�H�H�H�H H H #Hb�CregulatorsDCDC_REG1 0vdd_center ? q� W�p oq � �regulator-state-mem �DCDC_REG2 0vdd_cpu_l ? q� W�p oq � �� regulator-state-mem �DCDC_REG3 0vcc_ddr � �regulator-state-mem �DCDC_REG4 0vcc_1v8 ?w@ Ww@ � ��Iregulator-state-mem � �w@LDO_REG1 0vcc1v8_dvp ?w@ Ww@ � �regulator-state-mem �LDO_REG2 0vcc2v8_dvp ?*�� W*�� � �regulator-state-mem �LDO_REG3 0vcc1v8_pmu ?w@ Ww@ � �regulator-state-mem � �w@LDO_REG4 0vcc_sdio ?w@ W-�� � ���regulator-state-mem � �-��LDO_REG5 0vcca3v0_codec ?-�� W-�� � �regulator-state-mem �LDO_REG6 0vcc_1v5 ?�` W�` � �regulator-state-mem � ��`LDO_REG7 0vcca1v8_codec ?w@ Ww@ � ���regulator-state-mem �LDO_REG8 0vcc_3v0 ?-�� W-�� � ��regulator-state-mem � �-��SWITCH_REG1 0vcc3v3_s3 � ��regulator-state-mem �SWITCH_REG2 0vcc3v3_s0 � �regulator-state-mem �regulator@40silergy,syr827�@ � 0vdd_cpu_b�default�� ? �4 W�` o� � � H�regulator-state-mem �regulator@41silergy,syr828�A � 0vdd_gpu�default�� ? �4 W�` o� � � H��regulator-state-mem �i2c@ff3d0000rockchip,rk3399-i2c��=+� > ��� � �i2cpclk�8�default��+�okay�X�typec-portc@22 fcs,fusb302�" ���default�� �ports+port@0�endpoint@0V��1connectorusb-c-connector +dual 5USB-Cports+port@0�endpointV���port@1�endpointV���i2c@ff3e0000rockchip,rk3399-i2c��>+� > ��� � �i2cpclk�:�default��+ �disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwm��B ;�default����okay��pwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwm��B ;�default��� �disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwm��B  ;�default��� �disabledpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwm��B0 ;�default��� �disableddfi@ff630000��c@rockchip,rk3399-dfi��y �pclk_ddr_mon�video-codec@ff650000rockchip,rk3399-vpu��e �rq 1vepuvdpu�� �aclkhclk F�iommu@ff650800rockchip,iommu��e@�s�� �aclkiface M��video-codec@ff660000rockchip,rk3399-vdec��f��t �����axiahbcabaccore F� iommu@ff660480rockchip,iommu ��f�@�f�@�u�� �aclkiface  M��iommu@ff670800rockchip,iommu��g@�*�� �aclkiface M �disabledrga@ff680000rockchip,rk3399-rga��h�7��m�aclkhclksclk�jgi �coreaxiahb!efuse@ff690000rockchip,rk3399-efuse��i�+} �pclk_efusecpu-id@7�cpu-leakage@17�gpu-leakage@18�center-leakage@19�cpu-leakage@1a�logic-leakage@1b�wafer-info@1c�dma-controller@ff6d0000arm,pl330arm,primecell��m@ � Z e� �apb_pclk�^dma-controller@ff6e0000arm,pl330arm,primecell��n@ � Z e� �apb_pclk�Mclock-controller@ff750000rockchip,rk3399-pmucru��u��xin24m� |+�>(J���clock-controller@ff760000rockchip,rk3399-cru��v��xin24m� |�+��@��B��C��x�D>#g��/�;���рxh�<4`�������#�F�����ׄׄ �� ��ׄ�syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd��w+�io-domains"rockchip,rk3399-io-voltage-domain�okay �� � � ��mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0w�o�dphy-refdphy-cfggrf � �disabled��usb2phy@e450rockchip,rk3399-usb2phy��P{�phyclk��clk_usbphy0_480m�okay�+host-port �� 1linestate�okay_��,otg-port �0�ghj1otg-bvalidotg-idlinestate�okay�/portendpointV���usb2phy@e460rockchip,rk3399-usb2phy��`|�phyclk��clk_usbphy1_480m�okay�-host-port �� 1linestate�okay_��.otg-port �0�lmo1otg-bvalidotg-idlinestate�okay�2phy@f780rockchip,rk3399-emmc-phy���$��emmcclk �2 ��okay�*pcie-phyrockchip,rk3399-pcie-phy��refclk ����phy �disabled�phy@ff7c0000rockchip,rk3399-typec-phy��|~}�tcpdcoretcpdphy-ref+~>������L�uphyuphy-pipeuphy-tcphy�okaydp-port ��4usb3-port � ��0portendpointV���phy@ff800000rockchip,rk3399-typec-phy�����tcpdcoretcpdphy-ref+�>��� ���M�uphyuphy-pipeuphy-tcphy�okaydp-port ��5usb3-port ��3watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt����|�xrktimer@ff850000rockchip,rk3399-timer����QhZ �pclktimerspdif@ff870000rockchip,rk3399-spdif����Bo^ttx �mclkhclkU��default��f �disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s����'o^^ttxrx�i2s_clki2s_hclkV��bclk_onbclk_off����f �disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s����(o^^ttxrx�i2s_clki2s_hclkW��default��f�okay � ��i2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s����)o^^ttxrx�i2s_clki2s_hclkX�f�okay��vop@ff8f0000rockchip,rk3399-vop-lit ��� �� �w+��>ׄ������aclk_vopdclk_vophclk_vop F�� �axiahbdclk�okayport+�endpoint@0�V���endpoint@1�V���endpoint@2�V���endpoint@3�V���endpoint@4�V��7iommu@ff8f3f00rockchip,iommu���?�w�� �aclkiface M�okay��vop@ff900000rockchip,rk3399-vop-big ��� �� �v+��>ׄ������aclk_vopdclk_vophclk_vop F�� �axiahbdclk�okayport+�endpoint@0�V���endpoint@1�V���endpoint@2�V���endpoint@3�V���endpoint@4�V��6iommu@ff903f00rockchip,iommu���?�v�� �aclkiface M�okay��isp0@ff910000rockchip,rk3399-cif-isp���@�+n���ispaclkhclk F�y�~dphy �disabledports+port@0�+iommu@ff914000rockchip,iommu ���@��P�+�� �aclkiface M '��isp1@ff920000rockchip,rk3399-cif-isp���@�,o���ispaclkhclk F�y�~dphy �disabledports+port@0�+iommu@ff924000rockchip,iommu ���@��P�,�� �aclkiface M '��hdmi-soundsimple-audio-card Bi2s [ uhdmi-sound �disabledsimple-audio-card,cpu ��simple-audio-card,codec ��hdmi@ff940000rockchip,rk3399-dw-hdmi��� �(tqpo�iahbisfrcecgrfreff�okay ���default����ports+port@0�+endpoint@0�V���endpoint@1�V���port@1�dsi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi�����- �p�o�refpclkphy_cfggrf���apb+ �disabledports+port@0�+endpoint@0�V���endpoint@1�V���port@1�dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi������. �q�o�refpclkphy_cfggrf���apb+ � �disabled��ports+port@0�+endpoint@0�V���endpoint@1�V���port@1�dp@ff970000rockchip,rk3399-edp����� jlo �dppclkgrf�default����dp �disabledports+port@0�+endpoint@0�V���endpoint@1�V���port@1�gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860���0� 1jobmmugpu�#2 P#�okay�� ���gpinctrlrockchip,rk3399-pinctrl+�gpio@ff720000rockchip,gpio-bank��r�� � �� �%gpio@ff730000rockchip,gpio-bank��s�� � �� ��gpio@ff780000rockchip,gpio-bank��xP� � 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compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5ethernet0mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllermax-functionsnum-lanesrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wparasan,soc-ctl-syscondisable-cqe-dcmddr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkusb-role-switchremote-endpoint#sound-dai-cellsmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nshp-det-gpiospk-con-gpioreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosmax-speedvbat-supplyvddio-supplydmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supplyvbus-supplydata-rolelabel#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmorientation-switchrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nspwmsbrightness-levelsdefault-brightness-levelautorepeatdebounce-intervallinux,codedefault-statelinux,default-triggersimple-audio-card,widgetssimple-audio-card,routingreset-gpiosenable-active-high