� ����8�|( [�Dleez,p710rockchip,rk3399 +7Leez RK3399 P710aliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000�/i2c@ff3e0000�/serial@ff180000�/serial@ff190000�/serial@ff1a0000�/serial@ff1b0000�/serial@ff370000�/spi@ff1c0000�/spi@ff1d0000�/spi@ff1e0000�/spi@ff350000�/spi@ff1f0000�/spi@ff200000�/ethernet@fe300000�/mmc@fe310000�/mmc@fe320000�/mmc@fe330000cpus+cpu-mapcluster0core0�core1�core2�core3�cluster1core0�core1�cpu@0�cpuarm,cortex-a53��psci �#2dL \�i@{���@��� � � �cpu@1�cpuarm,cortex-a53��psci �#2dL \�i@{���@��� � � �cpu@2�cpuarm,cortex-a53��psci �#2dL \�i@{���@��� � � �cpu@3�cpuarm,cortex-a53��psci �#2dL \�i@{���@��� � � �cpu@100�cpuarm,cortex-a72��psci  #2�L \�i@{���@�����thermal-idle#�'��cpu@101�cpuarm,cortex-a72��psci  #2�L \�i@{���@�����thermal-idle#�'��l2-cache-cluster0cache^k@}� l2-cache-cluster1cache^k@}�idle-states"pscicpu-sleeparm,idle-state/@Wx��h�� cluster-sleeparm,idle-state/@W���h�� display-subsystemrockchip,display-subsystemymemory-controllerrockchip,rk3399-dmc���dmc_clk �disabledpmu_a53arm,cortex-a53-pmu�pmu_a72arm,cortex-a72-pmu�psci arm,psci-1.0smctimerarm,armv8-timer@�   �xin24m fixed-clock�n6�xin24m���pcie@f8000000rockchip,rk3399-pcie ���axi-baseapb-base�pci+ ' ��G��aclkaclk-perfhclkpm0�1231syslegacyclientA`Tbq y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38����������8��������(�coremgmtmgmt-stickypipepmpclkaclk �disabledinterrupt-controller� �pcie-ep@f8000000rockchip,rk3399-pcie-ep ���apb-basemem-base ��G��aclkaclk-perfhclkpm��8��������(�coremgmtmgmt-stickypipepmpclkaclk y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3� �default� �disabledethernet@fe300000rockchip,rk3399-gmac��0� 1macirq8ighfj�fM�stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac�� �stmmaceth �okay+�;Rinput_jrgmii�default� s � �'�P�(�mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc��1@�@��р �M���biuciuciu-driveciu-sample��y�reset�okay+�������!"�default �"#$0wifi@1brcm,bcm4329-fmac� %� 1host-wake�default�&mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc��2@�A��р+�> �� �L���biuciuciu-driveciu-sample��z�reset�okay�S� e%n�default�'()*mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1��3� y+N> ��N��clk_xinclk_ahb�emmc_cardclock�y+ ~phy_arasan��okay���"��usb@fe380000 generic-ehci��8���,y-~usb�okayusb@fe3a0000 generic-ohci��:���,y-~usb�okayusb@fe3c0000 generic-ehci��<���.y/~usb�okayusb@fe3e0000 generic-ohci��>� ��.y/~usb�okaydebug@fe430000&arm,coresight-cpu-debugarm,primecell��CM �apb_pclk�debug@fe432000&arm,coresight-cpu-debugarm,primecell��C M �apb_pclk�debug@fe434000&arm,coresight-cpu-debugarm,primecell��C@M �apb_pclk�debug@fe436000&arm,coresight-cpu-debugarm,primecell��C`M �apb_pclk�debug@fe610000&arm,coresight-cpu-debugarm,primecell��aL �apb_pclk�debug@fe710000&arm,coresight-cpu-debugarm,primecell��qL �apb_pclk�usb@fe800000rockchip,rk3399-dwc3+�0������G�ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�% �usb3-otg�okayusb@fe800000 snps,dwc3����i����refbus_earlysuspend�otgy01~usb2-phyusb3-phy �utmi_wide��,M�okayusb@fe900000rockchip,rk3399-dwc3+�0������G�ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�& �usb3-otg�okayusb@fe900000 snps,dwc3����n����refbus_earlysuspend�hosty23~usb2-phyusb3-phy �utmi_wide��,M�okaydp@fec00000rockchip,rk3399-cdn-dp���� +r�>�� �� ru�o�core-clkpclkspdifgrfy45 �HJ��spdifdptxapbcoreo �disabledportsport+endpoint@0��6��endpoint@1��7��interrupt-controller@fee00000 arm,gic-v3 +��P����� ������� �msi-controller@fee20000arm,gic-v3-its������ppi-partitionsinterrupt-partition-0��interrupt-partition-1��saradc@ff100000rockchip,rk3399-saradc���>�Pe�saradcapb_pclk�� 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�default�H�okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart��Tc�baudclkapb_pclk�e �default�I �disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi��G[�spiclkapb_pclk�DLJ J Qtxrx�default�KLMN+ �disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi��H\�spiclkapb_pclk�5LJ J Qtxrx�default�OPQR+ �disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi��I]�spiclkapb_pclk�4LJJQtxrx�default�STUV+ �disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi��J^�spiclkapb_pclk�CLJJQtxrx�default�WXYZ+ �disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi�� K_�spiclkapb_pclk��L[[ Qtxrx�default�\]^_+ �disabledthermal-zonescpu-thermal[dq�`tripscpu_alert0�p���passive�acpu_alert1�$����passive�bcpu_crit�s�� �criticalcooling-mapsmap0�a�����������������map1�bH�������������������������������������������������gpu-thermal[dq�`tripsgpu_alert0�$����passive�cgpu_crit�s�� �criticalcooling-mapsmap0�c �d��������tsadc@ff260000rockchip,rk3399-tsadc��&�a+O> q�Od�tsadcapb_pclk�� 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�disabledi2c@ff3c0000rockchip,rk3399-i2c��<+} > ��} } �i2cpclk�9�default��+�okay�����pmic@1brockchip,rk808� ����xin32krk808-clkout2�default��Wx�������������������� � 8�BregulatorsDCDC_REG1 vdd_center ) = O q� g�p qregulator-state-mem �DCDC_REG2 vdd_cpu_l ) = O q� g�p q� regulator-state-mem �DCDC_REG3 vcc_ddr ) =regulator-state-mem �DCDC_REG4 vcc_1v8 ) = Ow@ gw@�8regulator-state-mem � �w@LDO_REG1 vcc1v8_dvp ) = Ow@ gw@��regulator-state-mem �LDO_REG2 vcc1v8_hdmi ) = Ow@ gw@regulator-state-mem �LDO_REG3 vcca_1v8 ) = Ow@ gw@regulator-state-mem � �w@LDO_REG4 vccio_sd ) = O-�� g-����regulator-state-mem � �-��LDO_REG5 vcca3v0_codec ) = O-�� g-��regulator-state-mem �LDO_REG6 vcc_1v5 ) = O�` g�`regulator-state-mem � ��`LDO_REG7 vcc0v9_hdmi ) = O �� g ��regulator-state-mem �LDO_REG8 vcc_3v0 ) = O-�� g-���|regulator-state-mem � �-��regulator@40silergy,syr827�@ ��default�� vdd_cpu_b O �4 g�` � ) = ���regulator-state-mem �regulator@41silergy,syr828�A ��default�� vdd_gpu O �4 g�` � ) = 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�p�o�refpclkphy_cfggrf���apb+ �disabledports+port@0�+endpoint@0�����endpoint@1�����port@1�dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi������. �q�o�refpclkphy_cfggrf���apb+ � �disabled��ports+port@0�+endpoint@0�����endpoint@1�����port@1�dp@ff970000rockchip,rk3399-edp����� jlo �dppclkgrf�default����dp �disabledports+port@0�+endpoint@0�����endpoint@1�����port@1�gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860���0� 1jobmmugpu�#2 P#�okay�� ]��dpinctrlrockchip,rk3399-pinctrl+�gpio@ff720000rockchip,gpio-bank��r}� i y� �%gpio@ff730000rockchip,gpio-bank��s}� i y� ��gpio@ff780000rockchip,gpio-bank��xP� i y� �Cgpio@ff788000rockchip,gpio-bank��x�Q� i y� � gpio@ff790000rockchip,gpio-bank��yR� i y� pcfg-pull-up ���pcfg-pull-down ���pcfg-pull-none ���pcfg-pull-none-12ma � � ��pcfg-pull-none-13ma � � ��pcfg-pull-none-18ma � �pcfg-pull-none-20ma � �pcfg-pull-up-2ma � �pcfg-pull-up-8ma � �pcfg-pull-up-18ma � �pcfg-pull-up-20ma � �pcfg-pull-down-4ma � �pcfg-pull-down-8ma � �pcfg-pull-down-12ma � � pcfg-pull-down-18ma � �pcfg-pull-down-20ma � �pcfg-output-high �pcfg-output-low �pcfg-input-enable �pcfg-input-pull-up � �pcfg-input-pull-down � �clockclk-32k ��cifcif-clkin � �cif-clkouta � �edpedp-hpd ����gmacrgmii-pins� ��� � � � �����������rmii-pins� � � � � � ������i2c0i2c0-xfer �����i2c1i2c1-xfer ����9i2c2i2c2-xfer ����:i2c3i2c3-xfer ����;i2c4i2c4-xfer � � ���i2c5i2c5-xfer � � ��<i2c6i2c6-xfer � � ��=i2c7i2c7-xfer ����>i2c8i2c8-xfer �����i2s0i2s0-2ch-bus` �������i2s0-2ch-bus-bclk-off` �������i2s0-8ch-bus� ������������i2s0-8ch-bus-bclk-off� ������������i2s1i2s1-2ch-busP ��������i2s1-2ch-bus-bclk-offP ������sdio0sdio0-bus1 ��sdio0-bus4@ ������"sdio0-cmd ���#sdio0-clk ���$sdio0-cd ��sdio0-pwr ��sdio0-bkpwr ��sdio0-wp ��sdio0-int ��sdmmcsdmmc-bus1 ��sdmmc-bus4@ �� � � ��*sdmmc-clk � ��'sdmmc-cmd � ��)sdmmc-cd ���(sdmmc-wp ��suspendap-pwroff ��ddrio-pwroff ��spdifspdif-bus ����spdif-bus-1 ��spi0spi0-clk ���Kspi0-cs0 ���Nspi0-cs1 ��spi0-tx ���Lspi0-rx ���Mspi1spi1-clk � ��Ospi1-cs0 � ��Rspi1-rx ���Qspi1-tx ���Pspi2spi2-clk � ��Sspi2-cs0 � ��Vspi2-rx � ��Uspi2-tx � ��Tspi3spi3-clk ���~spi3-cs0 ����spi3-rx ����spi3-tx ���spi4spi4-clk ���Wspi4-cs0 ���Zspi4-rx ���Yspi4-tx ���Xspi5spi5-clk ���\spi5-cs0 ���_spi5-rx ���^spi5-tx ���]testclktest-clkout0 ��test-clkout1 ��test-clkout2 ��tsadcotp-pin ���eotp-out ���fuart0uart0-xfer ����?uart0-cts ���@uart0-rts ���Auart1uart1-xfer � � ��Guart2auart2a-xfer �� �uart2buart2b-xfer ���uart2cuart2c-xfer ����Huart3uart3-xfer ����Iuart3-cts ��uart3-rts ��uart4uart4-xfer �����uarthdcpuarthdcp-xfer ���pwm0pwm0-pin ����pwm0-pin-pull-down ��vop0-pwm-pin ��vop1-pwm-pin ��pwm1pwm1-pin ����pwm1-pin-pull-down ��pwm2pwm2-pin ����pwm2-pin-pull-down ��pwm3apwm3a-pin ����pwm3bpwm3b-pin ��hdmihdmi-i2c-xfer ���hdmi-cec ����pciepci-clkreqn-cpm ��pci-clkreqnb-cpm ���btbt-reg-on-h � ��Fbt-host-wake-l ���Dbt-wake-l ���Epmicpmic-int-l ����vsel1-pin ����vsel2-pin ����usb2vcc5v0-host3-en ����wifiwifi-reg-on-h � ���wifi-host-wake-l ���&opp-table-0operating-points-v2 �� opp00 �Q�  �� ��� �@opp01 �#�F  �� ���opp02 �0�,  �P �P�opp03 �<� HH�opp04 �G�� B@B@�opp05 �Tfr *�*��opp-table-1operating-points-v2 ��opp00 �Q�  �� ��� �@opp01 �#�F  �� ���opp02 �0�,  �� ���opp03 �<�  Y� Y��opp04 �G�� ~�~��opp05 �Tfr �����opp06 �_�" �����opp07 �kI� O�O��opp-table-2operating-points-v2��opp00 � ��  �� ���0opp01 ���@  �� ���0opp02 �ׄ  �� ���0opp03 ��e  Y� Y��0opp04 �#�F HH�0opp05 �/� �����0chosen serial2:1500000n8external-gmac-clock fixed-clock�sY@ �clkin_gmac��sdio-pwrseqmmc-pwrseq-simpleB �ext_clock�default�� ,% �!dc5v-adpregulator-fixed dc5v_adapter ) = OLK@ gLK@��vcc3v3-lanregulator-fixed vcc3v3_lan ) = O2Z� g2Z� ���vcc3v3-sysregulator-fixed vcc3v3_sys ) = O2Z� g2Z� ����vcc5v0-hostregulator-fixed vcc5v0_host = ) OS�` gS�` ����vcc5v0-host3regulator-fixed vcc5v0_host3 8 ~C�default�� ) ��vcc5v0-sysregulator-fixed vcc5v0_sys ) = OLK@ gLK@ ����vdd-logpwm-regulator K�a� P� vdd_log ) = O 5 g\� compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5ethernet0mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllermax-functionsnum-lanesrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wparasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobedr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorvin-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathreset-gpiosenable-active-highpwmspwm-supply