� ����8�4( ���&friendlyarm,nanopi-m4rockchip,rk3399 +7FriendlyElec NanoPi M4aliases=/pinctrl/gpio@ff720000C/pinctrl/gpio@ff730000I/pinctrl/gpio@ff780000O/pinctrl/gpio@ff788000U/pinctrl/gpio@ff790000[/i2c@ff3c0000`/i2c@ff110000e/i2c@ff120000j/i2c@ff130000o/i2c@ff3d0000t/i2c@ff140000y/i2c@ff150000~/i2c@ff160000�/i2c@ff3e0000�/serial@ff180000�/serial@ff190000�/serial@ff1a0000�/serial@ff1b0000�/serial@ff370000�/spi@ff1c0000�/spi@ff1d0000�/spi@ff1e0000�/spi@ff350000�/spi@ff1f0000�/spi@ff200000�/ethernet@fe300000�/mmc@fe310000�/mmc@fe320000�/mmc@fe330000cpus+cpu-mapcluster0core0�core1�core2�core3�cluster1core0�core1�cpu@0�cpuarm,cortex-a53��psci �#2dL \�i@{���@��� � � �cpu@1�cpuarm,cortex-a53��psci �#2dL \�i@{���@��� � � �cpu@2�cpuarm,cortex-a53��psci �#2dL \�i@{���@��� � � �cpu@3�cpuarm,cortex-a53��psci �#2dL \�i@{���@��� � � �cpu@100�cpuarm,cortex-a72��psci  #2�L \�i@{���@�����thermal-idle#�'��cpu@101�cpuarm,cortex-a72��psci  #2�L \�i@{���@�����thermal-idle#�'��l2-cache-cluster0cache^k@}� l2-cache-cluster1cache^k@}�idle-states"pscicpu-sleeparm,idle-state/@Wx��h�� cluster-sleeparm,idle-state/@W���h�� display-subsystemrockchip,display-subsystemymemory-controllerrockchip,rk3399-dmc���dmc_clk �disabledpmu_a53arm,cortex-a53-pmu�pmu_a72arm,cortex-a72-pmu�psci arm,psci-1.0smctimerarm,armv8-timer@�   �xin24m fixed-clock�n6�xin24m���pcie@f8000000rockchip,rk3399-pcie ���axi-baseapb-base�pci+ ' ��G��aclkaclk-perfhclkpm0�1231syslegacyclientA`Tbq y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38����������8��������(�coremgmtmgmt-stickypipepmpclkaclk�okay���interrupt-controller� �pcie-ep@f8000000rockchip,rk3399-pcie-ep ���apb-basemem-base ��G��aclkaclk-perfhclkpm��8��������(�coremgmtmgmt-stickypipepmpclkaclk y,~pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3�  default �disabledethernet@fe300000rockchip,rk3399-gmac��0� 1macirq8ighfj�fM�stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac%�� �stmmaceth3@�okayKb�rinput default  !"#�rgmii�$�(�mdiosnps,dwmac-mdio+ethernet-phy@1� %� �'�u0 �%�#mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc��1@�@��р �M���biuciuciu-driveciu-sample�%�y�reset�okay�5&@ default '()Nmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc��2@�A��рb�\ �� �L���biuciuciu-driveciu-sample�%�z�reset�okay�q �*� default+,-.N�/�0mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1��3� �bN\ ��N��clk_xinclk_ahb�emmc_cardclock�y1 ~phy_arasan%��okay��@��usb@fe380000 generic-ehci��8���2y3~usb�okayusb@fe3a0000 generic-ohci��:���2y3~usb�okayusb@fe3c0000 generic-ehci��<���4y5~usb�okayusb@fe3e0000 generic-ohci��>� ��4y5~usb�okaydebug@fe430000&arm,coresight-cpu-debugarm,primecell��CM �apb_pclk�debug@fe432000&arm,coresight-cpu-debugarm,primecell��C M �apb_pclk�debug@fe434000&arm,coresight-cpu-debugarm,primecell��C@M �apb_pclk�debug@fe436000&arm,coresight-cpu-debugarm,primecell��C`M �apb_pclk�debug@fe610000&arm,coresight-cpu-debugarm,primecell��aL �apb_pclk�debug@fe710000&arm,coresight-cpu-debugarm,primecell��qL �apb_pclk�usb@fe800000rockchip,rk3399-dwc3+�0������G�ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�% �usb3-otg�okayusb@fe800000 snps,dwc3����i����refbus_earlysuspend�otgy67~usb2-phyusb3-phy �utmi_wide�0Ij%�okayusb@fe900000rockchip,rk3399-dwc3+�0������G�ref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�& �usb3-otg�okayusb@fe900000 snps,dwc3����n����refbus_earlysuspend�hosty89~usb2-phyusb3-phy �utmi_wide�0Ij%�okaydp@fec00000rockchip,rk3399-cdn-dp���� br�\�� �� ru�o�core-clkpclkspdifgrfy:;% �HJ��spdifdptxapbcore3� �disabledportsport+endpoint@0��<��endpoint@1��=��interrupt-controller@fee00000 arm,gic-v3 +��P����� ������� �msi-controller@fee20000arm,gic-v3-its������ppi-partitionsinterrupt-partition-0��interrupt-partition-1��saradc@ff100000rockchip,rk3399-saradc���>�Pe�saradcapb_pclk�� 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defaultO�okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart��Tc�baudclkapb_pclk�e' defaultP �disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi��G[�spiclkapb_pclk�D�Q Q �txrx defaultRSTU+ �disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi��H\�spiclkapb_pclk�5�Q Q �txrx defaultVWXY+ �disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi��I]�spiclkapb_pclk�4�QQ�txrx defaultZ[\]+ �disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi��J^�spiclkapb_pclk�C�QQ�txrx default^_`a+ �disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi�� K_�spiclkapb_pclk���bb �txrx defaultcdef%+ �disabledthermal-zonescpu-thermal�d���gtripscpu_alert0�p���passive�hcpu_alert1�$����passive�icpu_crit�s�� �criticalcooling-mapsmap0�h�����������������map1�iH�������������������������������������������������gpu-thermal�d���gtripsgpu_alert0�$����passive�jgpu_crit�s�� �criticalcooling-mapsmap0�j �k��������tsadc@ff260000rockchip,rk3399-tsadc��&�abO\ q�Od�tsadcapb_pclk�� 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�p�o�refpclkphy_cfggrf%���apb3+ �disabledports+port@0�+endpoint@0�����endpoint@1�����port@1�dsi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi������. �q�o�refpclkphy_cfggrf%���apb3+ � �disabled��ports+port@0�+endpoint@0�����endpoint@1�����port@1�dp@ff970000rockchip,rk3399-edp����� jlo �dppclkgrf default�%��dp3 �disabledports+port@0�+endpoint@0�����endpoint@1�����port@1�gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860���0� 1jobmmugpu�#2 P%#�okay�� ���kpinctrlrockchip,rk3399-pinctrl3+�gpio@ff720000rockchip,gpio-bank��r�� � �� �*gpio@ff730000rockchip,gpio-bank��s�� � �� ��gpio@ff780000rockchip,gpio-bank��xP� � �� �Hgpio@ff788000rockchip,gpio-bank��x�Q� � �� �%gpio@ff790000rockchip,gpio-bank��yR� � �� pcfg-pull-up ���pcfg-pull-down ���pcfg-pull-none ���pcfg-pull-none-12ma � � ��pcfg-pull-none-13ma � � ��pcfg-pull-none-18ma � �pcfg-pull-none-20ma � �pcfg-pull-up-2ma � �pcfg-pull-up-8ma � �pcfg-pull-up-18ma � �pcfg-pull-up-20ma � �pcfg-pull-down-4ma � �pcfg-pull-down-8ma � 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��Sspi0-rx ��Tspi1spi1-clk  ��Vspi1-cs0  ��Yspi1-rx ��Xspi1-tx ��Wspi2spi2-clk  ��Zspi2-cs0  ��]spi2-rx  ��\spi2-tx  ��[spi3spi3-clk ���spi3-cs0 ���spi3-rx ���spi3-tx ���spi4spi4-clk ��^spi4-cs0 ��aspi4-rx ��`spi4-tx ��_spi5spi5-clk ��cspi5-cs0 ��fspi5-rx ��espi5-tx ��dtestclktest-clkout0 �test-clkout1 �test-clkout2 �tsadcotp-pin ��lotp-out ��muart0uart0-xfer ���Duart0-cts ��Fuart0-rts ��Euart1uart1-xfer  � ��Nuart2auart2a-xfer � �uart2buart2b-xfer ��uart2cuart2c-xfer ���Ouart3uart3-xfer ���Puart3-cts �uart3-rts �uart4uart4-xfer ����uarthdcpuarthdcp-xfer ��pwm0pwm0-pin ���pwm0-pin-pull-down �vop0-pwm-pin �vop1-pwm-pin �pwm1pwm1-pin ���pwm1-pin-pull-down �pwm2pwm2-pin �pwm2-pin-pull-down ���pwm3apwm3a-pin ���pwm3bpwm3b-pin �hdmihdmi-i2c-xfer ��hdmi-cec ���pciepci-clkreqn-cpm �pci-clkreqnb-cpm ��fusb30xfusb0-int ���gpio-ledsstatus-led-pin ���pmiccpu-b-sleep ���gpu-sleep ���pmic-int-l ���rockchip-keypower-key ���sdiobt-host-wake-l ��Jbt-reg-on-h ��Ibt-wake-l ��Kwifi-reg_on-h ���opp-table-0operating-points-v2 � opp00 $Q� + �� ��� 9�@opp01 $#�F + �� ���opp02 $0�, + �P �P�opp03 $<� +HH�opp04 $G�� +B@B@�opp05 $Tfr +*�*��opp-table-1operating-points-v2 �opp00 $Q� + �� ��� 9�@opp01 $#�F + �� ���opp02 $0�, + �� ���opp03 $<� + Y� Y��opp04 $G�� +~�~��opp05 $Tfr +�����opp06 $_�" +�����opp07 $kI� +O�O��opp-table-2operating-points-v2��opp00 $ �� + �� ���0opp01 $��@ + �� ���0opp02 $ׄ + �� ���0opp03 $�e + Y� Y��0opp04 $#�F +HH�0opp05 $/� +�����0chosen Jserial2:1500000n8external-gmac-clock fixed-clock�sY@ �clkin_gmac��vcc3v3-sysregulator-fixed���2Z��2Z� vcc3v3_sys .��Lvcc5v0-sysregulator-fixed���LK@�LK@ vcc5v0_sys .���vcc1v8-s3regulator-fixed���w@�w@ vcc1v8_s3 .M��vcc3v0-sdregulator-fixed V i* default���-���-�� vcc3v0_sd .L�/vcca0v9-s3regulator-fixed� ��� �� vcca0v9_s3 .��vcca1v8-s3regulator-fixed�w@�w@ vcca1v8_s3 .��vbus-typecregulator-fixed�LK@�LK@ vbus_typec� .���gpio-keys gpio-keys n default�key-power yd �* �GPIO Key Power �t sgpio-leds gpio-leds default�led-0 �*  �status_led �heartbeatsdio-pwrseqmmc-pwrseq-simpleG �ext_clock default� �* �&vdd-5vregulator-fixed vdd_5v����vcc5v0-coreregulator-fixed vcc5v0_core�� .���vcc5v0-usb1regulator-fixed vcc5v0_usb1�� .���vcc5v0-usb2regulator-fixed vcc5v0_usb2�� .��� compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5ethernet0mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesnum-lanesvpcie0v9-supplyvpcie1v8-supplyinterrupt-controllermax-functionsrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblassigned-clock-parentsassigned-clocksclock_in_outphy-handlephy-modephy-supplytx_delayrx_delayreset-assert-usreset-deassert-usreset-gpiosmax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wpvmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs200-1_8vdr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosmax-speedvbat-supplyvddio-supplydmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyfcs,suspend-voltage-selectorregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-on-in-suspendregulator-suspend-microvoltvbus-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,enable-strobe-pulldownrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathenable-active-highgpioautorepeatdebounce-intervallabellinux,codelinux,default-trigger