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q�nldo-reg2��� �P �P�vdd_ddr_pll_s0regulator-state-memL ; �Pnldo-reg3��� q� q� �avdd_0v75_s0regulator-state-memLnldo-reg4��� �P �P �vdd_0v85_s0regulator-state-memLnldo-reg5��� q� q� �vdd_0v75_s0regulator-state-memLspi@feb30000(rockchip,rk3588-spirockchip,rk3066-spi ���I0��spiclkapb_pclke��jtxrx  �����default+ 6disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uart ���L0��baudclkapb_pclke// jtxrx���default~t 6disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uart ���M0��baudclkapb_pclke/ / jtxrx���default~t6okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uart ���N0��baudclkapb_pclke/ / jtxrx���default~t 6disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uart ���O0��baudclkapb_pclke� � jtxrx���default~t 6disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uart ���P0��baudclkapb_pclke� � jtxrx���default~t 6disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uart ���Q0��baudclkapb_pclke� �jtxrx���default~t 6disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uart ���R0��baudclkapb_pclkennjtxrx���default~t 6disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uart ���S0��baudclkapb_pclken n jtxrx���default~t 6disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uart ���T0��baudclkapb_pclken n jtxrx���default~t 6disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm ��0LK pwmpclk���default� 6disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm ��0LK pwmpclk���default� 6disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm �� 0LK pwmpclk���default� 6disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm ��00LK pwmpclk���default� 6disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm ��0ON pwmpclk���default� 6disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm ��0ON pwmpclk���default� 6disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm �� 0ON pwmpclk���default� 6disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm ��00ON pwmpclk���default� 6disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm ��0RQ pwmpclk���default� 6disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm ��0RQ pwmpclk���default� 6disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm �� 0RQ pwmpclk���default� 6disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm ��00RQ pwmpclk���default� 6disabledthermal-zonespackage-thermal o � ��tripspackage-crit ��8 � criticalbigcore0-thermal od � ��tripsbigcore0-alert �L ��passive�bigcore0-crit ��8 � criticalcooling-mapsmap0 �� �����������������bigcore2-thermal od � ��tripsbigcore2-alert �L ��passive�bigcore2-crit ��8 � criticalcooling-mapsmap0 �� ��������� ��������littlecore-thermal od � ��tripslittlecore-alert �L ��passive�littlecore-crit ��8 � criticalcooling-mapsmap0 ��0 ���������������������������������center-thermal o � ��tripscenter-crit ��8 � criticalgpu-thermal od � ��tripsgpu-alert �L ��passive�gpu-crit ��8 � criticalcooling-mapsmap0 �� ����������npu-thermal o � ��tripsnpu-crit ��8 � criticaltsadc@fec00000rockchip,rk3588-tsadc ����0��tsadcapb_pclk7�G��iVWctsadc-apbtsadc ��� � ��� � �gpiootpout !6okay�adc@fec10000rockchip,rk3588-saradc ���� 70��saradcapb_pclkiU csaradc-apb6okay I� i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c ��0�� i2cpclk�C���default+6okay� @typec-portc@22 fcs,fusb302 " �����default U�connectorusb-c-connector adual kUSB-C qsource |��ports+port@0 endpoint,�%port@1 endpoint,��port@2 endpoint,��rtc@51haoyu,hym8563 Q��hym8563�default�� �� �i2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c ��0�� i2cpclk�D���default+6okay� @codec@1brealtek,rt5616 01mclk71G��portendpoint,��i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c ��0�� i2cpclk�E���default+ 6disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spi ���J0��spiclkapb_pclken njtxrx  �����default+ 6disabledefuse@fecc0000rockchip,rk3588-otp �� 0����otpapb_pclkphyarbi��� cotpapbarb+cpu-code@2 id@7 cpu-leakage@17 cpu-leakage@18 cpu-leakage@19 log-leakage@1a gpu-leakage@1b cpu-version@1c  �npu-leakage@28 (codec-leakage@29 )dma-controller@fed10000arm,pl330arm,primecell ��@ �Z[�0p apb_pclk nphy@fed60000rockchip,rk3588-hdptx-phy �� 0�Trefapbo8i#cde!""cphyapbinitcmnlaneroplllcpll�� 6disabledphy@fed80000rockchip,rk3588-usbdp-phy ��o0�lV�refclkimmortalpclkutmi(i   cinitcmnlanepcs_apbpma_apb �� �� �� ��6okay � � r r$port+endpoint@0 ,��endpoint@1 ,��phy@fee00000rockchip,rk3588-naneng-combphy ��0�vW refapbpipe7�G��oi<Ccphyapb , 2�6okayvphy@fee20000rockchip,rk3588-naneng-combphy ��0�xW refapbpipe7�G��oi>Ecphyapb , 2�6okay*sram@ff001000 mmio-sram ����+pinctrlrockchip,rk3588-pinctrl��+�gpio@fd8a0000rockchip,gpio-bank ���0qr � H� � #S THEADER_10HEADER_08HEADER_32IR receiver [PWM3_IR_M0]�gpio@fec20000rockchip,gpio-bank ���0st � H� � #� THEADER_27HEADER_28HEADER_15HEADER_26HEADER_21HEADER_19HEADER_23HEADER_24HEADER_22HEADER_05HEADER_03gpio@fec30000rockchip,gpio-bank ���0uv � H�@ � #. TCSI1_11CSI1_12 gpio@fec40000rockchip,gpio-bank ���0wx � H�` � #� THEADER_35HEADER_38HEADER_40HEADER_36HEADER_37DSI0_12HEADER_33DSI0_10HEADER_07HEADER_16HEADER_18HEADER_29HEADER_31HEADER_12DSI0_08DSI0_14HEADER_11HEADER_13DSI1_10gpio@fec50000rockchip,gpio-bank ���0yz � H�� � #C TDSI1_08DSI1_14DSI1_12CSI0_11CSI0_12rpcfg-pull-up d�pcfg-pull-down q�pcfg-pull-none ��pcfg-pull-none-drv-level-2 � ��pcfg-pull-up-drv-level-1 d ��pcfg-pull-up-drv-level-2 d ��pcfg-pull-none-smt � ��auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout ���emmc-bus8� ����������emmc-clk ���emmc-cmd ���emmc-data-strobe ���eth1fspifspim1-pins` � � ���� �|gmac1gpuhdmii2c0i2c0m2-xfer ���-i2c1i2c1m0-xfer � � ��i2c2i2c2m0-xfer � � ��i2c3i2c3m0-xfer � � ��i2c4i2c4m0-xfer � � ��i2c5i2c5m0-xfer � � ��i2c6i2c6m0-xfer � � ��i2c7i2c7m0-xfer � � ��i2c8i2c8m2-xfer � � ��i2s0i2s0-lrck ���i2s0-mclk ���i2s0-sclk ���i2s0-sdi0 ���i2s0-sdo0 ���i2s1i2s1m0-lrck ���i2s1m0-sclk ���i2s1m0-sdi0 ���i2s1m0-sdi1 ���i2s1m0-sdi2 ���i2s1m0-sdi3 ���i2s1m0-sdo0 � ��i2s1m0-sdo1 � ��i2s1m0-sdo2 � ��i2s1m0-sdo3 � ��i2s2i2s2m1-lrck ���i2s2m1-sclk � ��i2s2m1-sdi � ��i2s2m1-sdo � ��i2s3i2s3-lrck ���i2s3-sclk ���i2s3-sdi ���i2s3-sdo ���jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp ���������pmupwm0pwm0m0-pins ��1pwm1pwm1m1-pins � �2pwm2pwm2m0-pins ��3pwm3pwm3m0-pins ��4pwm4pwm4m0-pins � ��pwm5pwm5m0-pins � ��pwm6pwm6m0-pins � ��pwm7pwm7m0-pins � ��pwm8pwm8m0-pins � ��pwm9pwm9m0-pins � ��pwm10pwm10m0-pins � ��pwm11pwm11m0-pins � ��pwm12pwm12m0-pins � ��pwm13pwm13m0-pins � ��pwm14pwm14m0-pins � ��pwm15pwm15m0-pins � ��refclksatasata0sata1sata2sdiosdiom1-pins` ��������sdmmcsdmmc-bus4@ ������sdmmc-clk ��}sdmmc-cmd ��~sdmmc-det ��spdif0spdif1spi0spi0m0-pins0 �����spi0m0-cs0 ���spi0m0-cs1 ���spi1spi1m1-pins0 �����spi1m1-cs0 ���spi1m1-cs1 ���spi2spi2m2-pins0 �� ���spi2m2-cs0 � ��spi3spi3m1-pins0 �� ���spi3m1-cs0 ���spi3m1-cs1 ���spi4spi4m0-pins0 �����spi4m0-cs0 ���spi4m0-cs1 ���tsadctsadc-shut ���uart0uart0m1-xfer �� �0uart1uart1m1-xfer � � ��uart2uart2m0-xfer � � ��uart3uart3m1-xfer � � ��uart4uart4m1-xfer � � ��uart5uart5m1-xfer � � ��uart6uart6m1-xfer � � ��uart7uart7m1-xfer � � ��uart8uart8m1-xfer � � ��uart9uart9m1-xfer � � ��vopbt656gpio-functsadc-gpio-func ���eth0gmac0gpio-ledssys-led-pin �� usr-led-pin �� headphonehp-det ��hym8563hym8563-int ���ir-receiverir-receiver-pin �� pciepcie2-0-rst � �pcie2-1-rst ��tpcie2-2-rst ��xpcie-m20-pwren ��pcie-m21-pwren ��usbtypec5v-pwren ��usbc0-int ���4g-lte-pwren ��usb@fc400000rockchip,rk3588-dwc3snps,dwc3 �@@��0���ref_clksuspend_clkbus_clkIotg Q��Vusb2-phyusb3-phy `utmi_wide( iSp��� 6disabledsyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon �[�syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon �\syscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsyscon �\�@syscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd �]@@+usb2phy@4000rockchip,rk3588-usb2phy @�0�phyclk �usb480m_phy1��incphyapb 6disabledotg-porto 6disabled�i2s@fddc8000rockchip,rk3588-i2s-tdm �܀��0���mclk_txmclk_rxhclk7��enjtx( i�ctx-m 6disabledi2s@fddf4000rockchip,rk3588-i2s-tdm ��@��099?mclk_txmclk_rxhclk76�enjtx( i�ctx-m 6disabledi2s@fddf8000rockchip,rk3588-i2s-tdm �߀��0++'mclk_txmclk_rxhclk7(�enjrx( i�crx-m 6disabledi2s@fde00000rockchip,rk3588-i2s-tdm ����0&&"mclk_txmclk_rxhclk7#�enjrx( i�crx-m 6disabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+00@E;JOt)aclk_mstaclk_slvaclk_dbipclkauxpipe�pciP�syspmcmsglegacyerr#4`G����Ufu�}Q� Vpcie-phy( "T��� � �@ @0 @@���dbiapbconfigi&+ cpwrpipe6okay �r��legacy-interrupt-controller�# ��pcie-ep@fe150000rockchip,rk3588-pcie-epP @ @� @ @0�dbidbi2apbaddr_spaceatu00@E;JOt)aclk_mstaclk_slvaclk_dbipclkauxpipe�� +syspmcmsglegacyerrdma0dma1dma2dma3f}Q� Vpcie-phy( "i&+ cpwrpipe 6disabledpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+00AF<KPu)aclk_mstaclk_slvaclk_dbipclkauxpipe�pciP���syspmcmsglegacyerr#4`G����Ufu�}Q� Vpcie-phy( "T��� � �@ @@0 @@@���dbiapbconfigi', cpwrpipe 6disabledlegacy-interrupt-controller�# ���pcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcie /00BG=LQ�)aclk_mstaclk_slvaclk_dbipclkauxpipe�pciP������syspmcmsglegacyerr#4`G����Ufu q }Q� Vpcie-phy( "T��� � �@ �@0 @�@���dbiapbconfigi(- cpwrpipe+6okay �r �w�default�legacy-interrupt-controller�# ���ethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a � ���macirqeth_wake_irq(067X]40stmmacethclk_mac_refpclk_macaclk_macptp_ref( !i# cstmmaceth�j�,���� 6disabledmdiosnps,dwmac-mdio+stmmac-axi-config#3rx-queues-configCqueue0queue1tx-queues-configYqueue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci �"�(0c`fUpsatapmaliverxoobrefasico+ 6disabledsata-port@0 �@Q� Vsata-phy� � phy@fed90000rockchip,rk3588-usbdp-phy ��o0�mWrefclkimmortalpclkutmi(icinitcmnlanepcs_apbpma_apb � �� � �� 6disabled�phy@fee10000rockchip,rk3588-naneng-combphy ��0�wW refapbpipe7�G��oi=Dcphyapb , 26okay�phy@fee80000rockchip,rk3588-pcie3-phy ��o0ypclkiHcphy , �6okay�opp-table-cluster0operating-points-v2 � opp-1008000000 �<� � L� L�~� ��@opp-1200000000 �G�� � �4 �4~� ��@opp-1416000000 �Tfr � �� ��~� ��@ opp-1608000000 �_�" � �P �P~� ��@opp-1800000000 �kI� �~�~�~� ��@opp-table-cluster1operating-points-v2 �opp-1200000000 �G�� � L� L�B@ ��@opp-1416000000 �Tfr �  B@ ��@opp-1608000000 �_�" � �� ��B@ ��@opp-1800000000 �kI� � �P �PB@ ��@opp-2016000000 �x)� �HHB@ ��@opp-2208000000 ���h �llB@ ��@opp-2400000000 ��  �B@B@B@ ��@opp-table-cluster2operating-points-v2 �opp-1200000000 �G�� � L� L�B@ ��@opp-1416000000 �Tfr �  B@ ��@opp-1608000000 �_�" � �� ��B@ ��@opp-1800000000 �kI� � �P �PB@ ��@opp-2016000000 �x)� �HHB@ ��@opp-2208000000 ���h �llB@ ��@opp-2400000000 ��  �B@B@B@ ��@opp-tableoperating-points-v2!opp-300000000 �� � L� L� �Popp-400000000 �ׄ � L� L� �Popp-500000000 ��e � L� L� �Popp-600000000 �#�F � L� L� �Popp-700000000 �)�' � �` �` �Popp-800000000 �/� � q� q� �Popp-900000000 �5�� � 5 5 �Popp-1000000000 �;�� � �P �P �Padc-keys-0 adc-keys   buttons *w@ Ddbutton-maskrom kMask Rom R� ]�chosen wserial2:1500000n8ir-receivergpio-ir-receiver ���default� leds gpio-ledsled-0 �  ksystem-led �heartbeat�default� led-1 �  kuser-led�default� soundsimple-audio-card�default� �realtek,rt5616-codec �i2s � �0HeadphoneHeadphonesMicrophoneMicrophone JackNHeadphonesHPOLHeadphonesHPORMIC1Microphone JackMicrophone Jackmicbias1simple-audio-card,cpu5simple-audio-card,codec5vcc12v-dcin-regulatorregulator-fixed �vcc12v_dcin�����vcc5v0-sys-regulatorregulator-fixed �vcc5v0_sys���LK@LK@Avcc4v0-sys-regulatorregulator-fixed �vcc4v0_sys���= = A.vcc-1v1-nldo-s3-regulatorregulator-fixed�vcc-1v1-nldo-s3�������A.�vcc3v3-pcie20-regulatorregulator-fixed�vcc_3v3_pcie20���2Z�2Z�Awvbus5v0-typec-regulatorregulator-fixed? ��default����vbus5v0_typec�LK@LK@A�vcc3v3-pcie2x1l0-regulatorregulator-fixed? �r�default��vcc3v3_pcie2x1l0�2Z�2Z�Asvcc3v3-pcie30-regulatorregulator-fixed? � �default��vcc3v3_pcie30�2Z�2Z�A�vcc3v3-sd-s0-regulatorregulator-fixed �r�2Z��2Z� �vcc3v3_sd_s0A�vdd-4g-3v3-regulatorregulator-fixed? �r�default� �vdd_4g_3v3�2Z�2Z�A+ compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namespower-domainsstatusmali-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkusb-role-switchremote-endpointsnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplyinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthfifo-depthcap-mmc-highspeedcap-sd-highspeedcd-gpiosdisable-wpno-mmcno-sdiosd-uhs-sdr104vmmc-supplyvqmmc-supplyno-sdnon-removablemmc-hs400-1_8vmmc-hs400-enhanced-stroberockchip,trcm-sync-tx-onlydai-formatmclk-fsmbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-cssystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplygpio-controller#gpio-cellspinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplyvbus-supplydata-rolelabelpower-rolesource-pdoswakeup-sourcebitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfmode-switchorientation-switchsbu1-dc-gpiossbu2-dc-gpiosrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesgpio-line-namesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallinux,codepress-threshold-microvoltstdout-pathlinux,default-triggersimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,hp-det-gpiosimple-audio-card,widgetssimple-audio-card,routingsound-daienable-active-high