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MSM8998 v1 MTP>qcom,msm8998-mtpqcom,msm8998IhandsetVchosendserial0:115200n8memory@80000000pmemory|�reserved-memory,�memory@85800000|��`�memory@85e00000|���smem-mem@86000000|� ��memory@86200000|� ��memory@88f00000>qcom,rmtfs-mem|�� ���memory@8ab00000|��p�memory@8b200000|� ����memory@8cc00000|����3memory@93c00000|��P���memory@94100000|� ��2memory@94300000|�0���:memory@95200000|� �memory@95210000|�!P�memory@95600000|�`�memory@95700000|�p���mpss-metadata�� �@��4clocksxo-board >fixed-clock��$� �xo_board�sleep-clk >fixed-clock����#cpus,cpu@0pcpu >qcom,kryo280|�psci�"�l2-cache>cache3?�cpu@1pcpu >qcom,kryo280|�psci�"� cpu@2pcpu >qcom,kryo280|�psci�"� cpu@3pcpu >qcom,kryo280|�psci�"� cpu@100pcpu >qcom,kryo280|�psci�"� l2-cache>cache3?�cpu@101pcpu >qcom,kryo280|�psci�"� cpu@102pcpu >qcom,kryo280|�psci�"�cpu@103pcpu >qcom,kryo280|�psci�"�cpu-mapcluster0core0Mcore1M core2M core3M cluster1core0M core1M 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iommu@1680000">qcom,msm8998-smmu-v2qcom,smmu-v2|h��H�lmnopq�&iommu@16c0000">qcom,msm8998-smmu-v2qcom,smmu-v2|l��x�uvwxyz������pcie@1c00000$>qcom,pcie-msm8998qcom,pcie-msm8996 |�  ��parfdbielbiconfigppci���,��$pciephy okay0� 00� ���msi�$����(%^%[%\%]%_"pipeauxcfgbus_masterbus_slave2%@&� J'#pcie@0ppci|��,�phy@1c06000>qcom,msm8998-qmp-pcie-phy|�` okay %`%\%�%^auxcfg_ahbrefpipe�pcie_0_pipe_clk_src�Va%L%N hphycommont(�)�$ufshc@1da4000,>qcom,msm8998-ufshcqcom,ufshcjedec,ufs-2.0|�@% � �*ufsphy�2% okayUncore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@%m%%l%s"P%r%p%q@���� ��<4`�рa%hrst�+�,��,� q���� q��-phy@1da7000>qcom,msm8998-qmp-ufs-phy|�p"P%o%�refref_auxqrefhufsphya-V okayt(�)�*hwlock@1f40000>qcom,tcsr-mutex|��syscon@1f60000>qcom,msm8998-tcsrsyscon|��0syscon@1fc0000>qcom,msm8998-tcsrsyscon|�`�cpinctrl@3400000>qcom,msm8998-pinctrl|@� ��-'�9I�UQ�'sdc2-on-state�iclk-pins jsdc2_clko~cmd-pins jsdc2_cmdo �data-pins jsdc2_datao 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�blsp_spi1o~�}blsp1-spi2-default-statejgpio31gpio34gpio32gpio33 �blsp_spi2o~�~blsp1-spi3-default-statejgpio45gpio46gpio47gpio48 �blsp_spi2o~�blsp1-spi4-default-statejgpio8gpio9gpio10gpio11 �blsp_spi4o~��blsp1-spi5-default-statejgpio85gpio86gpio87gpio88 �blsp_spi5o~��blsp1-spi6-default-statejgpio41gpio42gpio43gpio44 �blsp_spi6o~��blsp2-i2c1-default-statejgpio55gpio56 �blsp_i2c7o~��blsp2-i2c1-sleep-statejgpio55gpio56 �blsp_i2c7o���blsp2-i2c2-default-state jgpio6gpio7 �blsp_i2c8o~��blsp2-i2c2-sleep-state jgpio6gpio7 �blsp_i2c8o���blsp2-i2c3-default-statejgpio51gpio52 �blsp_i2c9o~��blsp2-i2c3-sleep-statejgpio51gpio52 �blsp_i2c9o���blsp2-i2c4-default-statejgpio67gpio68 �blsp_i2c10o~��blsp2-i2c4-sleep-statejgpio67gpio68 �blsp_i2c10o���blsp2-i2c5-default-statejgpio60gpio61 �blsp_i2c11o~��blsp2-i2c5-sleep-statejgpio60gpio61 �blsp_i2c11o���blsp2-i2c6-default-statejgpio83gpio84 �blsp_i2c12o~��blsp2-i2c6-sleep-statejgpio83gpio84 �blsp_i2c12o���blsp2-spi1-default-statejgpio53gpio54gpio55gpio56 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apb_pclkatclkout-portsportendpoint5A�Gin-ports,port@0|endpoint5B�=port@1|endpoint5C�?replicator@6046000/>arm,coresight-dynamic-replicatorarm,primecell|` okay"" apb_pclkatclkout-portsportendpoint5D�Hin-portsportendpoint5E�Fetf@6047000 >arm,coresight-tmcarm,primecell|p okay"" apb_pclkatclkout-portsportendpoint5F�Ein-portsportendpoint5G�Aetr@6048000 >arm,coresight-tmcarm,primecell|� okay"" apb_pclkatclkEin-portsportendpoint5H�Detm@7840000">arm,coresight-etm4xarm,primecell|� okay"" apb_pclkatclkMout-portsportendpoint5I�Netm@7940000">arm,coresight-etm4xarm,primecell|� okay"" apb_pclkatclkM out-portsportendpoint5J�Oetm@7a40000">arm,coresight-etm4xarm,primecell|� okay"" apb_pclkatclkM out-portsportendpoint5K�Petm@7b40000">arm,coresight-etm4xarm,primecell|� okay"" apb_pclkatclkM out-portsportendpoint5L�Qfunnel@7b60000">arm,coresight-etm4xarm,primecell|�  disabled"" apb_pclkatclkout-portsportendpoint5M�Win-ports,port@0|endpoint5N�Iport@1|endpoint5O�Jport@2|endpoint5P�Kport@3|endpoint5Q�Lport@4|endpoint5R�Xport@5|endpoint5S�Yport@6|endpoint5T�Zport@7|endpoint5U�[funnel@7b70000+>arm,coresight-dynamic-funnelarm,primecell|�  disabled"" apb_pclkatclkout-portsportendpoint5V�@in-portsportendpoint5W�Metm@7c40000">arm,coresight-etm4xarm,primecell|� okay"" apb_pclkatclkM out-portsportendpoint5X�Retm@7d40000">arm,coresight-etm4xarm,primecell|� okay"" apb_pclkatclkM out-portsportendpoint5Y�Setm@7e40000">arm,coresight-etm4xarm,primecell|� okay"" apb_pclkatclkMout-portsportendpoint5Z�Tetm@7f40000">arm,coresight-etm4xarm,primecell|� okay"" apb_pclkatclkMout-portsportendpoint5[�Usram@290000>qcom,rpm-stats|)spmi@800f000>qcom,spmi-pmic-arb(|�@ @ @"�0�corechnlsobsrvrintrcnfg �periph_irq �FX`,�pmic@4>qcom,pm8005qcom,spmi-pmic|,gpio@c000 >qcom,pm8005-gpioqcom,spmi-gpio|�9-\I��\pmic@5>qcom,pm8005qcom,spmi-pmic|,regulators>qcom,pm8005-regulatorsYs1��6��m��pmic@0>qcom,pm8998qcom,spmi-pmic|,pon@800>qcom,pm8998-pon|��pwrkey>qcom,pm8941-pwrkey��= ��tresin>qcom,pm8941-resin��= �  disabledtemp-alarm@2400>qcom,spmi-temp-alarm|$�$�]�thermal��!charger@2800*>qcom,pm8998-coincellqcom,pm8941-coincell|(  disabledadc@3100>qcom,spmi-adc-rev2|1�1,��]channel@6|  die_tempadc-tm@3400>qcom,spmi-adc-tm-hc|4�4�,  disabledrtc@6000>qcom,pm8941-rtc|`a �rtcalarm�agpio@c000 >qcom,pm8998-gpioqcom,spmi-gpio|�9-^I��^pmic@1>qcom,pm8998qcom,spmi-pmic|,pmic@2>qcom,pmi8998qcom,spmi-pmic|,charger@1000>qcom,pmi8998-charger|@�-�usb-pluginbat-ovwdog-barkusbin-icl-change�__�usbin_iusbin_v  disabledgpio@c000!>qcom,pmi8998-gpioqcom,spmi-gpio|�9-`I��`adc@4500>qcom,pmi8998-rradc|E��_pmic@3>qcom,pmi8998qcom,spmi-pmic|,labibb>qcom,pmi8998-lab-ibbibb ��� �sc-errocplab ��� �sc-errocppwm>qcom,pmi8998-lpg,�  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otxrx defaultsleep � "���  disabled,i2c@c1b8000>qcom,i2c-qup-v2.2.1| � �h%=%6 coreiface j� �  otxrx defaultsleep � "���  disabled,i2c@c1b9000>qcom,i2c-qup-v2.2.1| � �i%?%6 coreiface j�� otxrx defaultsleep � "���  disabled,i2c@c1ba000>qcom,i2c-qup-v2.2.1| � �j%A%6 coreiface j�� otxrx defaultsleep � "���  disabled,spi@c1b5000>qcom,spi-qup-v2.2.1| P �e%8%6 coreiface j�� otxrx default �  disabled,spi@c1b6000>qcom,spi-qup-v2.2.1| ` �f%:%6 coreiface j��  otxrx default �  disabled,spi@c1b7000>qcom,spi-qup-v2.2.1| p �g%<%6 coreiface j� �  otxrx default �  disabled,spi@c1b8000>qcom,spi-qup-v2.2.1| � �h%>%6 coreiface j� �  otxrx default �  disabled,spi@c1b9000>qcom,spi-qup-v2.2.1| � �i%@%6 coreiface j�� otxrx default �  disabled,spi@c1ba000>qcom,spi-qup-v2.2.1| � �j%B%6 coreiface j�� otxrx default �  disabled,clock-controller@c8c0000>qcom,mmcc-msm8998�U'| �Jxogpll0dsi0dsidsi0bytedsi1dsidsi1bytehdmiplldplinkdpvcogpll0_divD"%�����%���display-subsystem@c900000>qcom,msm8998-mdss| ��mdss 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disabledvideo-decoder>venus-decoder�<core2�video-encoder>venus-encoder�=core2�iommu@cd00000">qcom,msm8998-smmu-v2qcom,smmu-v2| ��������iface-mmiface-smmubus-smmu���   �����������2� ��remoteproc@17300000>qcom,msm8998-adsp-pas|0@@@������#�wdogfatalreadyhandoverstop-ack"xo�����stop21�cx okayglink-edge �� lpass�� mailbox@17911000<>qcom,msm8998-apcs-hmss-globalqcom,msm8994-apcs-kpss-global|� ��timer@17920000,�>arm,armv7-timer-mem|�frame@17921000 ��|�� frame@17923000 � � |�0  disabledframe@17924000 � � |�@  disabledframe@17925000 � � |�P  disabledframe@17926000 � � |�`  disabledframe@17927000 � � |�p  disabledframe@17928000 � �|��  disabledinterrupt-controller@17a00000 >arm,gic-v3|��,�� � � � �wifi@18800000>qcom,wcn3990-wifi okay|���membase��"cxo_ref_clk_pin����������������  2 N� cn uo �paliases �/soc@0/serial@c1b0000 �/soc@0/serial@c171000vph-pwr-regulator>regulator-fixed �vph_pwr� �� interrupt-parentqcom,msm-id#address-cells#size-cellsmodelcompatiblechassis-typeqcom,board-idstdout-pathdevice_typeregrangesno-mapphandleqcom,client-idqcom,vmidalloc-rangessize#clock-cellsclock-frequencyclock-output-namesenable-methodcapacity-dmips-mhzcpu-idle-statesnext-level-cachecache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-hzrequired-oppsinterruptsqcom,rpm-msg-rammboxesqcom,glink-channelsclocksclock-names#power-domain-cellsoperating-points-v2opp-levelvdd_s1-supplyvdd_s2-supplyvdd_s3-supplyvdd_s4-supplyvdd_s5-supplyvdd_s6-supplyvdd_s7-supplyvdd_s8-supplyvdd_s9-supplyvdd_s10-supplyvdd_s11-supplyvdd_s12-supplyvdd_s13-supplyvdd_l1_l27-supplyvdd_l2_l8_l17-supplyvdd_l3_l11-supplyvdd_l4_l5-supplyvdd_l6-supplyvdd_l7_l12_l14_l15-supplyvdd_l9-supplyvdd_l10_l23_l25-supplyvdd_l13_l19_l21-supplyvdd_l16_l28-supplyvdd_l18_l22-supplyvdd_l20_l24-supplyvdd_l26-supplyvdd_lvs1_lvs2-supplyregulator-min-microvoltregulator-max-microvoltregulator-allow-set-loadregulator-system-loadvdd_bob-supplymemory-regionhwlocksqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellspolling-delay-passivethermal-sensorstemperaturehysteresis#reset-cellsprotected-clocksbits#qcom,sensorsinterrupt-names#thermal-sensor-cells#iommu-cells#global-interruptsreg-nameslinux,pci-domainbus-rangenum-lanesphysphy-namesstatusinterrupt-map-maskinterrupt-mappower-domainsiommu-mapperst-gpios#phy-cellsresetsreset-namesvdda-phy-supplyvdda-pll-supplylanes-per-directionfreq-table-hzvcc-supplyvccq-supplyvccq2-supplyvdd-hba-supplyvcc-max-microampvccq-max-microampvccq2-max-microamp#hwlock-cellsgpio-rangesgpio-controller#gpio-cellsgpio-reserved-rangespinsdrive-strengthbias-disablebias-pull-upfunctionbias-pull-downinterrupts-extendedqcom,smem-statesqcom,smem-state-namesqcom,halt-regspower-domain-nameslabeliommusopp-supported-hwpx-supplyremote-endpointarm,scatter-gatherqcom,eeqcom,channelregulator-enable-ramp-delayregulator-always-onmode-bootloadermode-recoverydebouncelinux,codeio-channelsio-channel-names#io-channel-cells#pwm-cellsassigned-clocksassigned-clock-ratessnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,parkmode-disable-ss-quirksnps,has-lpm-erratumsnps,hird-thresholddr_modeqcom,tcsr-regnvmem-cellsvdda-phy-dpdm-supplybus-widthcd-gpiosvmmc-supplyvqmmc-supplypinctrl-namespinctrl-0pinctrl-1#dma-cellsqcom,controlled-remotelynum-channelsqcom,num-eesdmasdma-namesvddio-supplyvddxo-supplyvddrf-supplyvddch0-supplymax-speedassigned-clock-parents#mbox-cellsframe-number#redistributor-regionsredistributor-strideqcom,snoc-host-cap-8bit-quirkqcom,no-msa-ready-indicatorvdd-0.8-cx-mx-supplyvdd-1.8-xo-supplyvdd-1.3-rfa-supplyvdd-3.3-ch0-supplyserial0serial1regulator-nameregulator-boot-on