� ��� 8��(4�� ',Qualcomm Technologies, Inc. SM8550 MTP2qcom,sm8550-mtpqcom,sm8550=handsetchosenJserial0:115200n8clocksxo-board 2fixed-clockVc��s�sleep-clk 2fixed-clockVc}s*bi-tcxo-div2-clkV2fixed-factor-clock{��s)bi-tcxo-ao-div2-clkV2fixed-factor-clock{��s�cpus cpu@0�cpu2arm,cortex-a510�{�psci���psci�� d%sl2-cache2cache4@�sl3-cache2cache4@scpu@100�cpu2arm,cortex-a510�{�psci���psci�� d%sl2-cache2cache4@�scpu@200�cpu2arm,cortex-a510�{�psci� � �psci�� d%sl2-cache2cache4@�s cpu@300�cpu2arm,cortex-a715�{�psci� � �psci�� %sl2-cache2cache4@�s cpu@400�cpu2arm,cortex-a715�{�psci� ��psci�� %sl2-cache2cache4@�s cpu@500�cpu2arm,cortex-a710�{�psci���psci�� %sl2-cache2cache4@�scpu@600�cpu2arm,cortex-a710�{�psci���psci�� %sl2-cache2cache4@�scpu@700�cpu2arm,cortex-x3�{�psci���psci��f L%sl2-cache2cache4@�scpu-mapcluster0core0Ncore1Ncore2Ncore3Ncore4Ncore5Ncore6Ncore7Nidle-statesRpscicpu-sleep-0-02arm,idle-state_silver-rail-power-collapseo@�&���,�s"cpu-sleep-1-02arm,idle-state_gold-rail-power-collapseo@�X����s#cpu-sleep-2-02arm,idle-state_goldplus-rail-power-collapseo@���F�8�s$domain-idle-statescluster-sleep-02domain-idle-stateoAD��� .�#�s%cluster-sleep-12domain-idle-stateoA�D� ��0�'�s&firmwarescm2qcom,scm-sm8550qcom,scm���interconnect-02qcom,sm8550-clk-virt�� s2interconnect-12qcom,sm8550-mc-virt�� smemory@a0000000�memory��pmu-a5102arm,cortex-a510-pmu  pmu-a7102arm,cortex-a710-pmu  pmu-a7152arm,cortex-a715-pmu  pmu-x32arm,cortex-x3-pmu  psci 2arm,psci-1.0�smcpower-domain-cpu0�!*"spower-domain-cpu1�!*"spower-domain-cpu2�!*"s power-domain-cpu3�!*#s power-domain-cpu4�!*#spower-domain-cpu5�!*#spower-domain-cpu6�!*#spower-domain-cpu7�!*$spower-domain-cluster*%&s!reserved-memory =hyp-region@80000000���Dcpusys-vm-region@80a00000���@Dhyp-tags-region@80e00000���=Dxbl-sc-region@d8100000��Dhyp-tags-reserved-region@811d0000��Dxbl-dt-log-merged-region@81a00000���&Daop-cmd-db-region@81c60000 2qcom,cmd-db���Daop-config-merged-region@81c80000���@Dsmem@81d00000 2qcom,smem��� K'Dadsp-mhi-region@81f00000���Dglobal-sync-region@82600000��`Dtz-stat-region@82700000��pDcdsp-secure-heap-region@82800000���`Dmpss-region@8a800000����Ds�q6-mpss-dtb-region@9b000000��Ds�ipa-fw-region@9b080000��Dipa-gsi-region@9b090000�� �Dgpu-micro-code-region@9b09a000�� � Ds�spss-region@9b100000��Dspu-tz-shared-region@9b280000��(Dspu-modem-shared-region@9b2e0000��.Dcamera-region@9b300000��0�Dvideo-region@9bb00000���pDcvp-region@9c200000�� pDcdsp-region@9c900000���Ds�q6-cdsp-dtb-region@9e900000���Ds�q6-adsp-dtb-region@9e980000���Ds�adspslpi-region@9ea00000���Ds�rmtfs-region@d4a800002qcom,rmtfs-mem�Ԩ(DSbmpss-dsm-region@d4d00000���0Ds�tz-reserved-region@d8000000��Dcpucp-fw-region@d8140000��Dqtee-region@d8300000��0PDta-region@d8800000�؀�Dtz-tags-region@e1200000�� tDhwfence-shbuf-region@e6440000��D'�Dtrust-ui-vm-region@f3600000��`��Dtrust-ui-vm-dump-region@f80ee000���Dtrust-ui-vm-qrt-region@f80ef000����Dtrust-ui-vm-vblk0-ring-region@f80f8000���@Dtrust-ui-vm-vblk1-ring-region@f80fc000���@Dtrust-ui-vm-swiotlb-region@f8100000��Doem-vm-region@f8400000��@�Doem-vm-vblk0-ring-region@fcc00000���@Doem-vm-swiotlb-region@fcc04000���@Dhyp-ext-tags-region@fce00000����Dhyp-ext-reserved-region@ff700000��pDsmp2p-adsp 2qcom,smp2pl��v( �(��master-kernel�master-kernel�s�slave-kernel �slave-kernel��s�smp2p-cdsp 2qcom,smp2pl^�v( �(��master-kernel�master-kernel�s�slave-kernel �slave-kernel��s�smp2p-modem 2qcom,smp2pl��v( �(��master-kernel�master-kernel�s�slave-kernel �slave-kernel��s�ipa-ap-to-modem�ipa�s�ipa-modem-to-ap�ipa��s�soc@0 2simple-bus=� clock-controller@1000002qcom,sm8550-gcc�BV<{)*+,,---.s0mailbox@4080002qcom,sm8550-ipccqcom,ipcc�@�  ���s(dma-controller@800000(2qcom,sm8550-gpi-dmaqcom,sm6350-gpi-dma!��� LMNOPQRSTUVW, 9> J/6Q ^disableds5geniqup@8c00002qcom,geni-se-qup�� = em-ahbs-ahb{0�0� J/#Q  ^disabledi2c@8800002qcom,geni-i2c��@ese{0oqdefault1  u H�2234�qup-corequp-configqup-memory �55�txrx ^disabledspi@8800002qcom,geni-spi��@ese{0o  uqdefault67H�2234�qup-corequp-configqup-memory �55�txrx  ^disabledi2c@8840002qcom,geni-i2c��@@ese{0qqdefault8  G H�2234�qup-corequp-configqup-memory �55�txrx ^disabledspi@8840002qcom,geni-spi��@@ese{0q  Gqdefault9:H�2234�qup-corequp-configqup-memory �55�txrx  ^disabledi2c@8880002qcom,geni-i2c���@ese{0sqdefault;  H H�2234�qup-corequp-configqup-memory �55�txrx ^disabledspi@8880002qcom,geni-spi���@ese{0s  Hqdefault<=H�2234�qup-corequp-configqup-memory �55�txrx  ^disabledi2c@88c0002qcom,geni-i2c���@ese{0uqdefault>  I H�2234�qup-corequp-configqup-memory �55�txrx ^disabledspi@88c0002qcom,geni-spi���@ese{0u  Iqdefault?@H�2234�qup-corequp-configqup-memory �55�txrx  ^disabledi2c@8900002qcom,geni-i2c��@ese{0wqdefaultA  J H�2234�qup-corequp-configqup-memory �55�txrx ^disabledspi@8900002qcom,geni-spi��@ese{0w  JqdefaultBCH�2234�qup-corequp-configqup-memory �55�txrx  ^disabledi2c@8940002qcom,geni-i2c��@@ese{0yqdefaultD  K H�2234�qup-corequp-configqup-memory �55�txrx ^disabledspi@8940002qcom,geni-spi��@@ese{0y  KqdefaultEFH�2234�qup-corequp-configqup-memory �55�txrx  ^disabledserial@8980002qcom,geni-uart���@ese{0{qdefaultGH  �0�2234�qup-corequp-config ^disabledi2c@89c0002qcom,geni-i2c���@ese{0}qdefaultI  � H�2234�qup-corequp-configqup-memory �55�txrx ^disabledspi@89c0002qcom,geni-spi���@ese{0}  �qdefaultJKH�2234�qup-corequp-configqup-memory �55�txrx  ^disabledgeniqup@9c00002qcom,geni-se-i2c-master-hub�� es-ahb{0Z =^okayi2c@9800002qcom,geni-i2c-master-hub��@esecore{0F0EqdefaultL  � 0�2234�qup-corequp-config ^disabledi2c@9840002qcom,geni-i2c-master-hub��@@esecore{0H0EqdefaultM  � 0�2234�qup-corequp-config ^disabledi2c@9880002qcom,geni-i2c-master-hub���@esecore{0J0EqdefaultN  � 0�2234�qup-corequp-config^okaytypec-mux@42 2fcs,fsa4480�B�O��portendpoint�Psi2c@98c0002qcom,geni-i2c-master-hub���@esecore{0L0EqdefaultQ  � 0�2234�qup-corequp-config ^disabledi2c@9900002qcom,geni-i2c-master-hub��@esecore{0N0EqdefaultR  � 0�2234�qup-corequp-config ^disabledi2c@9940002qcom,geni-i2c-master-hub��@@esecore{0P0EqdefaultS  � 0�2234�qup-corequp-config ^disabledi2c@9980002qcom,geni-i2c-master-hub���@esecore{0R0EqdefaultT  � 0�2234�qup-corequp-config ^disabledi2c@99c0002qcom,geni-i2c-master-hub���@esecore{0T0EqdefaultU  � 0�2234�qup-corequp-config ^disabledi2c@9a00002qcom,geni-i2c-master-hub��@esecore{0V0EqdefaultV  � 0�2234�qup-corequp-config ^disabledi2c@9a40002qcom,geni-i2c-master-hub��@@esecore{0X0EqdefaultW  � 0�2234�qup-corequp-config ^disableddma-controller@a00000(2qcom,sm8550-gpi-dmaqcom,sm6350-gpi-dma!��� %&'()*, 9 J/�Q ^disabledsZgeniqup@ac00002qcom,geni-se-qup�� = em-ahbs-ahb{00� J/��22 �qup-coreQ ^okayi2c@a800002qcom,geni-i2c��@ese{0]qdefaultX  a H�2234Y�qup-corequp-configqup-memory �ZZ�txrx ^disabledspi@a800002qcom,geni-spi��@ese{0]  aqdefault[\H�2234Y�qup-corequp-configqup-memory �ZZ�txrx  ^disabledi2c@a840002qcom,geni-i2c��@@ese{0_qdefault]  b H�2234Y�qup-corequp-configqup-memory �ZZ�txrx ^disabledspi@a840002qcom,geni-spi��@@ese{0_  bqdefault^_H�2234Y�qup-corequp-configqup-memory �ZZ�txrx  ^disabledi2c@a880002qcom,geni-i2c���@ese{0aqdefault`  c H�2234Y�qup-corequp-configqup-memory �ZZ�txrx ^disabledspi@a880002qcom,geni-spi���@ese{0a  cqdefaultabH�2234Y�qup-corequp-configqup-memory �ZZ�txrx  ^disabledi2c@a8c0002qcom,geni-i2c���@ese{0cqdefaultc  d H�2234Y�qup-corequp-configqup-memory �ZZ�txrx ^disabledspi@a8c0002qcom,geni-spi���@ese{0c  dqdefaultdeH�2234Y�qup-corequp-configqup-memory �ZZ�txrx  ^disabledi2c@a900002qcom,geni-i2c��@ese{0eqdefaultf  e H�2234Y�qup-corequp-configqup-memory �ZZ�txrx ^disabledspi@a900002qcom,geni-spi��@ese{0e  eqdefaultghH�2234Y�qup-corequp-configqup-memory �ZZ�txrx  ^disabledi2c@a940002qcom,geni-i2c��@@ese{0gqdefaulti  fH�2234Y�qup-corequp-configqup-memory �ZZ�txrx  ^disabledspi@a940002qcom,geni-spi��@@ese{0g  fqdefaultjkH�2234Y�qup-corequp-configqup-memory �ZZ�txrx  ^disabledi2c@a980002qcom,geni-i2c���@ese{0iqdefaultl  kH�2234Y�qup-corequp-configqup-memory �ZZ�txrx  ^disabledspi@a980002qcom,geni-spi���@ese{0i  kqdefaultmnH�2234Y�qup-corequp-configqup-memory �ZZ�txrx  ^disabledserial@a9c0002qcom,geni-debug-uart���@ese{0kqdefaulto  C�qup-corequp-config0�2234^okayinterconnect@15000002qcom,sm8550-cnoc-main�P0��� sqinterconnect@16000002qcom,sm8550-config-noc�`b�� s4interconnect@16800002qcom,sm8550-system-noc�hЀ�� interconnect@16c00002qcom,sm8550-pcie-anoc�l"�{00 � spinterconnect@16e00002qcom,sm8550-aggre1-noc�nD�{00� sYinterconnect@17000002qcom,sm8550-aggre2-noc�p��{ � sinterconnect@17800002qcom,sm8550-mmss-noc�x��� s�rng@10c30002qcom,sm8550-trngqcom,trng� 0pcie@1c00000�pci2qcom,pcie-sm8550P��0`` �``�parfdbielbiatuconfig 8=` `0`0���Q� ` ��������(msi0msi1msi2msi3msi4msi5msi6msi7�$�7����8{0"0$0%0*0+00=eauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggr0�p3q�pcie-memcpu-pcie Err M//W0^pci�0j+opciephy^okay ys` �s^qdefaulttpcie@0�pci��� =phy@1c06000 2qcom,sm8550-qmp-gen3x2-pcie-phy��` ({0"0$0&0(eauxcfg_ahbrefrchngpipeW0^phy�0&����0V�pcie0_pipe_clk�^okay�u�vs+pcie@1c08000�pci2qcom,pcie-sm8550P���0@@ �@@�parfdbielbiatuconfig 8=@ @0@0���Q� ` 34589:vw(msi0msi1msi2msi3msi4msi5msi6msi7�$�7����@{0,0.0/0607000 Ieauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbunoc_aggrcnoc_sf_axi�0,�$�0�p3q �pcie-memcpu-pcie Er�r� M/�/�W00 ^pcilink_down�0j,opciephy^okay ysc �saqdefaultwpcie@0�pci��� =phy@1c0e000 2qcom,sm8550-qmp-gen4x2-pcie-phy��� ({000.0204eauxcfg_ahbrefrchngpipeW0 0 ^phyphy_nocsr�02����0V�pcie1_pipe_clk�^okay�x�v�us,dma-controller@1dc4000 2qcom,bam-v1.7.4qcom,bam-v1.7.0��@�  ! J/�/�sycrypto@1dfa000)2qcom,sm8550-qceqcom,sm8150-qceqcom,qce�ߠ`�yy�rxtxJ/�/���memoryphy@1d800002qcom,sm8550-qmp-ufs-phy�� {0�erefref_auxqref�0Wz^ufsphyV�^okay�{�vs-ufs@1d84000+2qcom,sm8550-ufshcqcom,ufshcjedec,ufs-2.0��@0   j-oufsphy%W0^rst�09| J/`QG}0�Y34#�ufs-ddrcpu-ufsnecore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@{0�00�0�0�0�0�[~^okay ds��p� ���O���szopp-table2operating-points-v2s}opp-75000000@�xh�xh�9�opp-150000000@��р�р9�opp-300000000@���9|crypto@1d88000;2qcom,sm8550-inline-crypto-engineqcom,inline-crypto-engine�؀�{0�s~hwlock@1f400002qcom,tcsr-mutex���s'clock-controller@1fc00002qcom,sm8550-tcsrsyscon��{Vsgpu@3d00000!2qcom,adreno-43050a01qcom,adreno0�����#�kgsl_3d0_reg_memorycx_memcx_dbgc  ,J��G���%^okays�zap-shader���qcom/sm8550/a740_zap.mbnopp-table2operating-points-v2s�opp-680000000�(����opp-615000000�$�'���opp-550000000� �U���opp-475000000�O���Popp-401000000���@�@opp-348000000���<opp-295000000��W��8opp-220000000� ��4gmu@3d6a000&2qcom,adreno-gmu-740.1qcom,adreno-gmu0�֠P� (�gmursccgmu_pdc 01hfigmu8{���0 0 ��!eahbgmucxoaximemnochubdemet����cxgx J���G�s�opp-table2operating-points-v2s�opp-500000000��e��opp-200000000� ���@clock-controller@3d900002qcom,sm8550-gpucc���{)00Vs�iommu@3da0000@2qcom,sm8550-smmu-500qcom,adreno-smmuqcom,smmu-500arm,mmu-500���8 ��������������>?@A�������� {� 0 0!�ehlosbusifaceahb��Qs�ipa@3f400002qcom,sm8550-ipaJ/�/�0���P�@��ipa-regipa-sharedgsi8v����(ipagsiipa-clock-queryipa-setup-ready{ ecore0�34�memoryconfig����*,ipa-clock-enabled-validipa-clock-enabled ^disabledremoteproc@40800002qcom,sm8550-mpss-pas�@@Lv�����0wdogfatalreadyhandoverstop-ackshutdown-ack{exo��� �cxmss� �������,stop^okay0�qcom/sm8550/modem.mbnqcom/sm8550/modem_dtb.mbnglink-edgev( �(Bmpss�codec@6aa00002qcom,sm8550-lpass-wsa-macro��({�D�f�g�emclkmacrodcodecfsgenV �wsa2-mclkHs�soundwire@6ab00002qcom,soundwire-v2.0.0��  �{�eifaceBWSA2�qdefaultYh x??���� ��� � ���������� ������������ ������������ ������������ � ������������� %������������� H ^disabledcodec@6ac00002qcom,sm8550-lpass-rx-macro��({�@�f�g�emclkmacrodcodecfsgenV�mclkHs�soundwire@6ad00002qcom,soundwire-v2.0.0��  �{�eifaceBRX�qdefaultYh x?������� � ������ � ������ ����������� ����������� ��������� ���������� ���������� %������ H^okayscodec@0,42sdw20217010d00�=scodec@6ae00002qcom,sm8550-lpass-tx-macro��({�9�f�g�emclkmacrodcodecfsgenV�mclkHs�codec@6b000002qcom,sm8550-lpass-wsa-macro��({�B�f�g�emclkmacrodcodecfsgenV�mclkHs�soundwire@6b100002qcom,soundwire-v2.0.0��  �{�eifaceBWSA�qdefaultYh x??���� ��� � ���������� ������������ ������������ ������������ � ������������� %������������� H^okaysspeaker@0,02sdw20217020400�qdefault� R�H bSpkrLeftt���� sspeaker@0,12sdw20217020400�qdefault� R�H bSpkrRightt���� ssoundwire@6d300002qcom,soundwire-v2.0.0�� � corewakeup{�eifaceBTX�qdefaultYh���������������������������% H^okayscodec@0,32sdw20217010d00��scodec@6d440002qcom,sm8550-lpass-va-macro��@${�9�f�gemclkmacrodcodecV�fsgenHs�pinctrl@6e800002qcom,sm8550-lpass-lpi-pinctrl ��%����{�f�g ecoreaudios�tx-swr-active-states�clk-pins�gpio0 �swr_tx_clk data-pins�gpio1gpio2gpio14 �swr_tx_data-rx-swr-active-states�clk-pins�gpio3 �swr_rx_clk data-pins �gpio4gpio5 �swr_rx_data-dmic01-default-stateclk-pins�gpio6 �dmic1_clk;data-pins�gpio7 �dmic1_dataGdmic23-default-stateclk-pins�gpio8 �dmic2_clk;data-pins�gpio9 �dmic2_dataGwsa-swr-active-states�clk-pins�gpio10 �wsa_swr_clk data-pins�gpio11 �wsa_swr_data-wsa2-swr-active-states�clk-pins�gpio15 �wsa2_swr_clk data-pins�gpio16�wsa2_swr_data-spkr-1-sd-n-active-state�gpio17�gpio Ts�spkr-2-sd-n-active-state�gpio18�gpio Ts�interconnect@74000002qcom,sm8550-lpass-lpiaon-noc�@���� interconnect@74300002qcom,sm8550-lpass-lpicx-noc�C��� s�interconnect@7e400002qcom,sm8550-lpass-ag-noc������ mmc@8804000$2qcom,sm8550-sdhciqcom,sdhci-msm-v5��@ ��hc_irqpwr_irq{0�0�eifacecorexo J/@_d,o�h��G�0�34�sdhc-ddrcpu-sdhcQ�^okay �� qdefaultsleep�����������opp-table2operating-points-v2s�opp-19200000�$�9�opp-50000000����9�opp-100000000���9�opp-202000000� F�9�clock-controller@aaf00002qcom,sm8550-videocc� � {)0���9�Vcci@ac15000!2qcom,sm8550-cciqcom,msm8996-cci� �P  ���{���ecamnoc_axicpas_ahbcci�����qdefaultsleep ^disabled i2c-bus@0�cB@ i2c-bus@1�cB@ cci@ac16000!2qcom,sm8550-cciqcom,msm8996-cci� �`  ���{��� ecamnoc_axicpas_ahbcci���qdefaultsleep ^disabled i2c-bus@0�cB@ cci@ac17000!2qcom,sm8550-cciqcom,msm8996-cci� �p  ���{��� ecamnoc_axicpas_ahbcci�����qdefaultsleep ^disabled i2c-bus@0�cB@ i2c-bus@1�cB@ clock-controller@ade00002qcom,sm8550-camcc� �{0)�*��9�Vs�display-subsystem@ae000002qcom,sm8550-mdss� ��mdss  S�� {�00�=W���0��3 �mdp0-memmdp1-mem J/ =^okays�display-controller@ae010002qcom,sm8550-dpu � �� �  �mdpvbif� 0{00��@�=�I!ebusnrt_busifacelutcorevsync����I�$�G�ports port@0�endpoint��s�port@1�endpoint��s�port@2�endpoint��s�opp-table2operating-points-v2s�opp-200000000� ��9�opp-325000000�_@9�opp-375000000�Z �9�opp-514000000���9|displayport-controller@ae900002qcom,sm8550-dpqcom,sm8350-dpP� � � � � �� ({�� ���;ecore_ifacecore_auxctrl_linkctrl_link_ifacestream_pixel����..j.odpHG���^okayports port@0�endpoint��s�port@1�endpoint���s�opp-table2operating-points-v2s�opp-162000000� ��9�opp-270000000�߀9�opp-540000000� /�9�opp-810000000�0G��9|dsi@ae94000(2qcom,sm8550-dsi-ctrlqcom,mdss-dsi-ctrl� �@ �dsi_ctrl� 0{���B�8�0$ebytebyte_intfpixelcoreifacebus�����C���G�j�odsi ^okay�vports port@0�endpoint��s�port@1�endpoint���s�opp-table2operating-points-v2s�opp-187500000� -�9�opp-300000000��9�opp-358000000�V��9�panel@02visionox,vtdr6130�qdefaultsleep����� � � � ds�portendpoint��s�phy@ae950002qcom,sm8550-dsi-phy-4nm0� �P �R� �U�dsi_phydsi_phy_lanedsi_pll{� eifacerefV�^okay %us�dsi@ae96000(2qcom,sm8550-dsi-ctrlqcom,mdss-dsi-ctrl� �` �dsi_ctrl� 0{�� �D�:�0$ebytebyte_intfpixelcoreifacebus���� �E���G�j�odsi  ^disabledports port@0�endpoint��s�port@1�endpointphy@ae970002qcom,sm8550-dsi-phy-4nm0� �p �r� �u�dsi_phydsi_phy_lanedsi_pll{� eifacerefV� ^disableds�clock-controller@af000002qcom,sm8550-dispcc� �\{)�0*����..��9�Vs�phy@88e30002qcom,sm8550-snps-eusb2-phy��0T�{erefW0^okay u 1vj�s�phy@88e80002qcom,sm8550-qmp-usb3-dp-phy���0 {0�0�0�eauxrefcom_auxusb3_pipe�0W00 ^phycommonV��^okay�v��s.ports port@0�endpoint��sport@1�endpoint��s�port@2�endpoint��s�usb@a6f88002qcom,sm8550-dwc3qcom,dwc3� o� =0{0 0�00�0�&ecfg_noccoreifacesleepmock_utmixo�0�0��$� ��Dv�����<pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq�09|W00�Y34$�usb-ddrapps-usb^okayusb@a600000 2snps,dwc3� `�  � J/@ j�.ousb2-phyusb3-phy ? S p � � � � � �  *Q 9ports port@0�endpoint��sport@1�endpoint��s�interrupt-controller@b2200002qcom,sm8550-pdcqcom,pdc � "@�d< I�^^a}?~� ����s�thermal-sensor@c271000 2qcom,sm8550-tsensqcom,tsens-v2 � ' "  Y ��uplowcritical gs�thermal-sensor@c272000 2qcom,sm8550-tsensqcom,tsens-v2 � '  "0 Y ��uplowcritical gs�thermal-sensor@c273000 2qcom,sm8550-tsensqcom,tsens-v2 � '0 "@ Y ��uplowcritical gs�power-management@c300000#2qcom,sm8550-aoss-qmpqcom,aoss-qmp� 0(v( �(Vs�sram@c3f00002qcom,rpmh-stats� ?spmi@c4000002qcom,spmi-pmic-arbP� @0 P@ D L B�@�corechnlsobsrvrintrcnfg periph_irq v� } � ��pmic@c2qcom,pm8010qcom,spmi-pmic�  temp-alarm@24002qcom,spmi-temp-alarm�$ $ gspmic@d2qcom,pm8010qcom,spmi-pmic�  temp-alarm@24002qcom,spmi-temp-alarm�$ $ gspmic@12qcom,pm8550qcom,spmi-pmic� temp-alarm@a002qcom,spmi-temp-alarm�    gsgpio@8800 2qcom,pm8550-gpioqcom,spmi-gpio����� ���s�sdc2-card-det-state�gpio12�normalG � � �s�led-controller@ee00*2qcom,pm8550-flash-ledqcom,spmi-flash-led�� ^disabledpwm!2qcom,pm8550-pwmqcom,pm8350c-pwm � ^disabledpmic@72qcom,pm8550qcom,spmi-pmic� temp-alarm@a002qcom,spmi-temp-alarm�    gsgpio@8800!2qcom,pm8550b-gpioqcom,spmi-gpio����� ���s�phy@fd002qcom,pm8550b-eusb2-repeater��� �� ��s�pmic@52qcom,pm8550qcom,spmi-pmic� temp-alarm@a002qcom,spmi-temp-alarm�    gsgpio@8800"2qcom,pm8550ve-gpioqcom,spmi-gpio��������s�pmic@22qcom,pm8550qcom,spmi-pmic� temp-alarm@a002qcom,spmi-temp-alarm�    gsgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio��������s�pmic@32qcom,pm8550qcom,spmi-pmic� temp-alarm@a002qcom,spmi-temp-alarm�    gsgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio��������s�pmic@42qcom,pm8550qcom,spmi-pmic� temp-alarm@a002qcom,spmi-temp-alarm�    gsgpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio��������s�pmic@62qcom,pm8550qcom,spmi-pmic� temp-alarm@a002qcom,spmi-temp-alarm�    gs gpio@8800"2qcom,pm8550vs-gpioqcom,spmi-gpio��������s�pmic@02qcom,pm8550qcom,spmi-pmic� pon@13002qcom,pmk8350-pon� �hlospbspwrkey2qcom,pmk8350-pwrkey  �t ^disabledresin2qcom,pmk8350-resin  ^disabledrtc@61002qcom,pmk8350-rtc�ab �rtcalarm bnvram@71002qcom,spmi-sdam�q  =qreboot-reason@48�H �s gpio@8800!2qcom,pmk8550-gpioqcom,spmi-gpio��������s�pmic@a2qcom,pmr735dqcom,spmi-pmic�  temp-alarm@a002qcom,spmi-temp-alarm�   gs gpio@8800!2qcom,pmr735d-gpioqcom,spmi-gpio��������s�pmic@b2qcom,pmr735dqcom,spmi-pmic�  temp-alarm@a002qcom,spmi-temp-alarm�   gs gpio@8800!2qcom,pmr735d-gpioqcom,spmi-gpio��������s�pinctrl@f1000002qcom,sm8550-tlmm�0  ������s� ��  sscci0-0-default-states�sda-pins�gpio110 �cci_i2c_sda ��scl-pins�gpio111 �cci_i2c_scl ��cci0-0-sleep-states�sda-pins�gpio110 �cci_i2c_sda scl-pins�gpio111 �cci_i2c_scl cci0-1-default-states�sda-pins�gpio112 �cci_i2c_sda ��scl-pins�gpio113 �cci_i2c_scl ��cci0-1-sleep-states�sda-pins�gpio112 �cci_i2c_sda scl-pins�gpio113 �cci_i2c_scl cci1-0-default-states�sda-pins�gpio114 �cci_i2c_sda ��scl-pins�gpio115 �cci_i2c_scl ��cci1-0-sleep-states�sda-pins�gpio114 �cci_i2c_sda scl-pins�gpio115 �cci_i2c_scl cci2-0-default-states�sda-pins�gpio74 �cci_i2c_sda ��scl-pins�gpio75 �cci_i2c_scl ��cci2-0-sleep-states�sda-pins�gpio74 �cci_i2c_sda scl-pins�gpio75 �cci_i2c_scl cci2-1-default-states�sda-pins�gpio0 �cci_i2c_sda ��scl-pins�gpio1 �cci_i2c_scl ��cci2-1-sleep-states�sda-pins�gpio0 �cci_i2c_sda scl-pins�gpio1 �cci_i2c_scl hub-i2c0-data-clk-state�gpio16gpio17 �i2chub0_se0 �sLhub-i2c1-data-clk-state�gpio18gpio19 �i2chub0_se1 �sMhub-i2c2-data-clk-state�gpio20gpio21 �i2chub0_se2 �sNhub-i2c3-data-clk-state�gpio22gpio23 �i2chub0_se3 �sQhub-i2c4-data-clk-state �gpio4gpio5 �i2chub0_se4 �sRhub-i2c5-data-clk-state �gpio6gpio7 �i2chub0_se5 �sShub-i2c6-data-clk-state �gpio8gpio9 �i2chub0_se6 �sThub-i2c7-data-clk-state�gpio10gpio11 �i2chub0_se7 �sUhub-i2c8-data-clk-state�gpio206gpio207 �i2chub0_se8 �sVhub-i2c9-data-clk-state�gpio84gpio85 �i2chub0_se9 �sWpcie0-default-statestperst-pins�gpio94�gpio clkreq-pins�gpio95�pcie0_clk_req_n �wake-pins�gpio96�gpio �pcie1-default-stateswperst-pins�gpio97�gpio clkreq-pins�gpio98�pcie1_clk_req_n �wake-pins�gpio99�gpio �qup-i2c0-data-clk-state�gpio28gpio29 �qup1_se0 ��sXqup-i2c1-data-clk-state�gpio32gpio33 �qup1_se1 ��s]qup-i2c2-data-clk-state�gpio36gpio37 �qup1_se2 ��s`qup-i2c3-data-clk-state�gpio40gpio41 �qup1_se3 ��scqup-i2c4-data-clk-state�gpio44gpio45 �qup1_se4 ��sfqup-i2c5-data-clk-state�gpio52gpio53 �qup1_se5 ��siqup-i2c6-data-clk-state�gpio48gpio49 �qup1_se6 ��slqup-i2c8-data-clk-states1scl-pins�gpio57�qup2_se0_l1_mira ��sda-pins�gpio56�qup2_se0_l0_mira ��qup-i2c9-data-clk-state�gpio60gpio61 �qup2_se1 ��s8qup-i2c10-data-clk-state�gpio64gpio65 �qup2_se2 ��s;qup-i2c11-data-clk-state�gpio68gpio69 �qup2_se3 ��s>qup-i2c12-data-clk-state �gpio2gpio3 �qup2_se4 ��sAqup-i2c13-data-clk-state�gpio80gpio81 �qup2_se5 ��sDqup-i2c15-data-clk-state�gpio72gpio106 �qup2_se7 ��sIqup-spi0-cs-state�gpio31 �qup1_se0 s\qup-spi0-data-clk-state�gpio28gpio29gpio30 �qup1_se0 s[qup-spi1-cs-state�gpio35 �qup1_se1 s_qup-spi1-data-clk-state�gpio32gpio33gpio34 �qup1_se1 s^qup-spi2-cs-state�gpio39 �qup1_se2 sbqup-spi2-data-clk-state�gpio36gpio37gpio38 �qup1_se2 saqup-spi3-cs-state�gpio43 �qup1_se3 sequp-spi3-data-clk-state�gpio40gpio41gpio42 �qup1_se3 sdqup-spi4-cs-state�gpio47 �qup1_se4 shqup-spi4-data-clk-state�gpio44gpio45gpio46 �qup1_se4 sgqup-spi5-cs-state�gpio55 �qup1_se5 skqup-spi5-data-clk-state�gpio52gpio53gpio54 �qup1_se5 sjqup-spi6-cs-state�gpio51 �qup1_se6 snqup-spi6-data-clk-state�gpio48gpio49gpio50 �qup1_se6 smqup-spi8-cs-state�gpio59�qup2_se0_l3_mira s7qup-spi8-data-clk-state�gpio56gpio57gpio58�qup2_se0_l2_mira s6qup-spi9-cs-state�gpio63 �qup2_se1 s:qup-spi9-data-clk-state�gpio60gpio61gpio62 �qup2_se1 s9qup-spi10-cs-state�gpio67 �qup2_se2 s=qup-spi10-data-clk-state�gpio64gpio65gpio66 �qup2_se2 s<qup-spi11-cs-state�gpio71 �qup2_se3 s@qup-spi11-data-clk-state�gpio68gpio69gpio70 �qup2_se3 s?qup-spi12-cs-state�gpio119 �qup2_se4 sCqup-spi12-data-clk-state�gpio2gpio3gpio118 �qup2_se4 sBqup-spi13-cs-state�gpio83 �qup2_se5 sFqup-spi13-data-clk-state�gpio80gpio81gpio82 �qup2_se5 sEqup-spi15-cs-state�gpio75 �qup2_se7 sKqup-spi15-data-clk-state�gpio72gpio106gpio74 �qup2_se7 sJqup-uart7-default-state�gpio26gpio27 �qup1_se7 soqup-uart14-default-state�gpio78gpio79 �qup2_se6 �sGqup-uart14-cts-rts-state�gpio76gpio77 �qup2_se6 sHsdc2-sleep-states�clk-pins �sdc2_clk cmd-pins �sdc2_cmd �data-pins �sdc2_data �sdc2-default-states�clk-pins �sdc2_clk cmd-pins �sdc2_cmd � data-pins �sdc2_data � sde-dsi-active-state�gpio133�gpio s�sde-dsi-suspend-state�gpio133�gpio s�sde-te-active-state�gpio86 �mdp_vsync s�sde-te-suspend-state�gpio86 �mdp_vsync s�wcd-reset-n-active-state�gpio108�gpio Ts iommu@15000000/2qcom,sm8550-smmu-500qcom,smmu-500arm,mmu-500��� Aabcdefghijklmnopqrstuv������������;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXY�������������������������������Qs/interrupt-controller@17100000 2arm,gic-v3 � =�� % <    smsi-controller@171400002arm,gic-v3-its� Q `srtimer@174200002arm,armv7-timer-mem�B=  frame@17421000�BB  k frame@17423000�B0 k   ^disabledframe@17425000�BP k   ^disabledframe@17427000�Bp k   ^disabledframe@17429000�B� k   ^disabledframe@1742b000�B� k   ^disabledframe@1742d000�B� k   ^disabledrsc@17a00000 Bapps_rsc2qcom,rpmh-rsc@������drv-0drv-1drv-2drv-3$  x  � ��!bcm-voter2qcom,bcm-voters clock-controller2qcom,sm8550-rpmh-clkVexo{�spower-controller2qcom,sm8550-rpmhpdG�s�opp-table2operating-points-v2s�opp-16�opp-48�0s�opp-52�4opp-56�8s�opp-60�<opp-64�@s�opp-80�Popp-128��s�opp-144��opp-192��s�opp-256�s|opp-320�@opp-336�Popp-384��opp-416��regulators-02qcom,pm8550-rpmh-regulators �b �� �� �� �O �� O O -O >� M� \� k�bob1 zvreg_bob1 �2K �